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STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_hal_usart.h 00004 * @author MCD Application Team 00005 * @brief Header file of USART HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32H7xx_HAL_USART_H 00021 #define STM32H7xx_HAL_USART_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32h7xx_hal_def.h" 00029 00030 /** @addtogroup STM32H7xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup USART 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /** @defgroup USART_Exported_Types USART Exported Types 00040 * @{ 00041 */ 00042 00043 /** 00044 * @brief USART Init Structure definition 00045 */ 00046 typedef struct 00047 { 00048 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. 00049 The baud rate is computed using the following formula: 00050 Baud Rate Register[15:4] = ((2 * fclk_pres) / 00051 ((huart->Init.BaudRate)))[15:4] 00052 Baud Rate Register[3] = 0 00053 Baud Rate Register[2:0] = (((2 * fclk_pres) / 00054 ((huart->Init.BaudRate)))[3:0]) >> 1 00055 where fclk_pres is the USART input clock frequency (fclk) 00056 divided by a prescaler. 00057 @note Oversampling by 8 is systematically applied to 00058 achieve high baud rates. */ 00059 00060 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 00061 This parameter can be a value of @ref USARTEx_Word_Length. */ 00062 00063 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 00064 This parameter can be a value of @ref USART_Stop_Bits. */ 00065 00066 uint32_t Parity; /*!< Specifies the parity mode. 00067 This parameter can be a value of @ref USART_Parity 00068 @note When parity is enabled, the computed parity is inserted 00069 at the MSB position of the transmitted data (9th bit when 00070 the word length is set to 9 data bits; 8th bit when the 00071 word length is set to 8 data bits). */ 00072 00073 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 00074 This parameter can be a value of @ref USART_Mode. */ 00075 00076 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. 00077 This parameter can be a value of @ref USART_Clock_Polarity. */ 00078 00079 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. 00080 This parameter can be a value of @ref USART_Clock_Phase. */ 00081 00082 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted 00083 data bit (MSB) has to be output on the SCLK pin in synchronous mode. 00084 This parameter can be a value of @ref USART_Last_Bit. */ 00085 00086 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the USART clock source. 00087 This parameter can be a value of @ref USART_ClockPrescaler. */ 00088 } USART_InitTypeDef; 00089 00090 /** 00091 * @brief HAL USART State structures definition 00092 */ 00093 typedef enum 00094 { 00095 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */ 00096 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 00097 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */ 00098 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */ 00099 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 00100 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */ 00101 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 00102 HAL_USART_STATE_ERROR = 0x04U /*!< Error */ 00103 } HAL_USART_StateTypeDef; 00104 00105 /** 00106 * @brief USART clock sources definitions 00107 */ 00108 typedef enum 00109 { 00110 USART_CLOCKSOURCE_D2PCLK1 = 0x00U, /*!< Domain2 PCLK1 clock source */ 00111 USART_CLOCKSOURCE_D2PCLK2 = 0x01U, /*!< Domain2 PCLK2 clock source */ 00112 USART_CLOCKSOURCE_PLL2 = 0x02U, /*!< PLL2Q clock source */ 00113 USART_CLOCKSOURCE_PLL3 = 0x04U, /*!< PLL3Q clock source */ 00114 USART_CLOCKSOURCE_HSI = 0x08U, /*!< HSI clock source */ 00115 USART_CLOCKSOURCE_CSI = 0x10U, /*!< CSI clock source */ 00116 USART_CLOCKSOURCE_LSE = 0x20U, /*!< LSE clock source */ 00117 USART_CLOCKSOURCE_UNDEFINED = 0x40U /*!< Undefined clock source */ 00118 } USART_ClockSourceTypeDef; 00119 00120 /** 00121 * @brief USART handle Structure definition 00122 */ 00123 typedef struct __USART_HandleTypeDef 00124 { 00125 USART_TypeDef *Instance; /*!< USART registers base address */ 00126 00127 USART_InitTypeDef Init; /*!< USART communication parameters */ 00128 00129 const uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ 00130 00131 uint16_t TxXferSize; /*!< USART Tx Transfer size */ 00132 00133 __IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */ 00134 00135 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */ 00136 00137 uint16_t RxXferSize; /*!< USART Rx Transfer size */ 00138 00139 __IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */ 00140 00141 uint16_t Mask; /*!< USART Rx RDR register mask */ 00142 00143 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 00144 00145 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 00146 00147 uint32_t SlaveMode; /*!< Enable/Disable UART SPI Slave Mode. This parameter can be a value 00148 of @ref USARTEx_Slave_Mode */ 00149 00150 uint32_t FifoMode; /*!< Specifies if the FIFO mode will be used. This parameter can be a value 00151 of @ref USARTEx_FIFO_mode. */ 00152 00153 void (*RxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Rx IRQ handler */ 00154 00155 void (*TxISR)(struct __USART_HandleTypeDef *husart); /*!< Function pointer on Tx IRQ handler */ 00156 00157 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */ 00158 00159 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */ 00160 00161 HAL_LockTypeDef Lock; /*!< Locking object */ 00162 00163 __IO HAL_USART_StateTypeDef State; /*!< USART communication state */ 00164 00165 __IO uint32_t ErrorCode; /*!< USART Error code */ 00166 00167 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 00168 void (* TxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Half Complete Callback */ 00169 void (* TxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Complete Callback */ 00170 void (* RxHalfCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Half Complete Callback */ 00171 void (* RxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Complete Callback */ 00172 void (* TxRxCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Rx Complete Callback */ 00173 void (* ErrorCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Error Callback */ 00174 void (* AbortCpltCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Abort Complete Callback */ 00175 void (* RxFifoFullCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Rx Fifo Full Callback */ 00176 void (* TxFifoEmptyCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Tx Fifo Empty Callback */ 00177 00178 void (* MspInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp Init callback */ 00179 void (* MspDeInitCallback)(struct __USART_HandleTypeDef *husart); /*!< USART Msp DeInit callback */ 00180 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 00181 00182 } USART_HandleTypeDef; 00183 00184 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 00185 /** 00186 * @brief HAL USART Callback ID enumeration definition 00187 */ 00188 typedef enum 00189 { 00190 HAL_USART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< USART Tx Half Complete Callback ID */ 00191 HAL_USART_TX_COMPLETE_CB_ID = 0x01U, /*!< USART Tx Complete Callback ID */ 00192 HAL_USART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< USART Rx Half Complete Callback ID */ 00193 HAL_USART_RX_COMPLETE_CB_ID = 0x03U, /*!< USART Rx Complete Callback ID */ 00194 HAL_USART_TX_RX_COMPLETE_CB_ID = 0x04U, /*!< USART Tx Rx Complete Callback ID */ 00195 HAL_USART_ERROR_CB_ID = 0x05U, /*!< USART Error Callback ID */ 00196 HAL_USART_ABORT_COMPLETE_CB_ID = 0x06U, /*!< USART Abort Complete Callback ID */ 00197 HAL_USART_RX_FIFO_FULL_CB_ID = 0x07U, /*!< USART Rx Fifo Full Callback ID */ 00198 HAL_USART_TX_FIFO_EMPTY_CB_ID = 0x08U, /*!< USART Tx Fifo Empty Callback ID */ 00199 00200 HAL_USART_MSPINIT_CB_ID = 0x09U, /*!< USART MspInit callback ID */ 00201 HAL_USART_MSPDEINIT_CB_ID = 0x0AU /*!< USART MspDeInit callback ID */ 00202 00203 } HAL_USART_CallbackIDTypeDef; 00204 00205 /** 00206 * @brief HAL USART Callback pointer definition 00207 */ 00208 typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< pointer to an USART callback function */ 00209 00210 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 00211 00212 /** 00213 * @} 00214 */ 00215 00216 /* Exported constants --------------------------------------------------------*/ 00217 /** @defgroup USART_Exported_Constants USART Exported Constants 00218 * @{ 00219 */ 00220 00221 /** @defgroup USART_Error_Definition USART Error Definition 00222 * @{ 00223 */ 00224 #define HAL_USART_ERROR_NONE (0x00000000U) /*!< No error */ 00225 #define HAL_USART_ERROR_PE (0x00000001U) /*!< Parity error */ 00226 #define HAL_USART_ERROR_NE (0x00000002U) /*!< Noise error */ 00227 #define HAL_USART_ERROR_FE (0x00000004U) /*!< Frame error */ 00228 #define HAL_USART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 00229 #define HAL_USART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00230 #define HAL_USART_ERROR_UDR (0x00000020U) /*!< SPI slave underrun error */ 00231 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 00232 #define HAL_USART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 00233 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 00234 #define HAL_USART_ERROR_RTO (0x00000080U) /*!< Receiver Timeout error */ 00235 /** 00236 * @} 00237 */ 00238 00239 /** @defgroup USART_Stop_Bits USART Number of Stop Bits 00240 * @{ 00241 */ 00242 #define USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< USART frame with 0.5 stop bit */ 00243 #define USART_STOPBITS_1 0x00000000U /*!< USART frame with 1 stop bit */ 00244 #define USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< USART frame with 1.5 stop bits */ 00245 #define USART_STOPBITS_2 USART_CR2_STOP_1 /*!< USART frame with 2 stop bits */ 00246 /** 00247 * @} 00248 */ 00249 00250 /** @defgroup USART_Parity USART Parity 00251 * @{ 00252 */ 00253 #define USART_PARITY_NONE 0x00000000U /*!< No parity */ 00254 #define USART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 00255 #define USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 00256 /** 00257 * @} 00258 */ 00259 00260 /** @defgroup USART_Mode USART Mode 00261 * @{ 00262 */ 00263 #define USART_MODE_RX USART_CR1_RE /*!< RX mode */ 00264 #define USART_MODE_TX USART_CR1_TE /*!< TX mode */ 00265 #define USART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 00266 /** 00267 * @} 00268 */ 00269 00270 /** @defgroup USART_Clock USART Clock 00271 * @{ 00272 */ 00273 #define USART_CLOCK_DISABLE 0x00000000U /*!< USART clock disable */ 00274 #define USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< USART clock enable */ 00275 /** 00276 * @} 00277 */ 00278 00279 /** @defgroup USART_Clock_Polarity USART Clock Polarity 00280 * @{ 00281 */ 00282 #define USART_POLARITY_LOW 0x00000000U /*!< Driver enable signal is active high */ 00283 #define USART_POLARITY_HIGH USART_CR2_CPOL /*!< Driver enable signal is active low */ 00284 /** 00285 * @} 00286 */ 00287 00288 /** @defgroup USART_Clock_Phase USART Clock Phase 00289 * @{ 00290 */ 00291 #define USART_PHASE_1EDGE 0x00000000U /*!< USART frame phase on first clock transition */ 00292 #define USART_PHASE_2EDGE USART_CR2_CPHA /*!< USART frame phase on second clock transition */ 00293 /** 00294 * @} 00295 */ 00296 00297 /** @defgroup USART_Last_Bit USART Last Bit 00298 * @{ 00299 */ 00300 #define USART_LASTBIT_DISABLE 0x00000000U /*!< USART frame last data bit clock pulse not output to SCLK pin */ 00301 #define USART_LASTBIT_ENABLE USART_CR2_LBCL /*!< USART frame last data bit clock pulse output to SCLK pin */ 00302 /** 00303 * @} 00304 */ 00305 00306 /** @defgroup USART_ClockPrescaler USART Clock Prescaler 00307 * @{ 00308 */ 00309 #define USART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 00310 #define USART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 00311 #define USART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 00312 #define USART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 00313 #define USART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 00314 #define USART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 00315 #define USART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 00316 #define USART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 00317 #define USART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 00318 #define USART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 00319 #define USART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 00320 #define USART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 00321 00322 /** 00323 * @} 00324 */ 00325 00326 /** @defgroup USART_Request_Parameters USART Request Parameters 00327 * @{ 00328 */ 00329 #define USART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 00330 #define USART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 00331 /** 00332 * @} 00333 */ 00334 00335 /** @defgroup USART_Flags USART Flags 00336 * Elements values convention: 0xXXXX 00337 * - 0xXXXX : Flag mask in the ISR register 00338 * @{ 00339 */ 00340 #define USART_FLAG_TXFT USART_ISR_TXFT /*!< USART TXFIFO threshold flag */ 00341 #define USART_FLAG_RXFT USART_ISR_RXFT /*!< USART RXFIFO threshold flag */ 00342 #define USART_FLAG_RXFF USART_ISR_RXFF /*!< USART RXFIFO Full flag */ 00343 #define USART_FLAG_TXFE USART_ISR_TXFE /*!< USART TXFIFO Empty flag */ 00344 #define USART_FLAG_REACK USART_ISR_REACK /*!< USART receive enable acknowledge flag */ 00345 #define USART_FLAG_TEACK USART_ISR_TEACK /*!< USART transmit enable acknowledge flag */ 00346 #define USART_FLAG_BUSY USART_ISR_BUSY /*!< USART busy flag */ 00347 #define USART_FLAG_UDR USART_ISR_UDR /*!< SPI slave underrun error flag */ 00348 #define USART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< USART transmit data register empty */ 00349 #define USART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< USART TXFIFO not full */ 00350 #define USART_FLAG_RTOF USART_ISR_RTOF /*!< USART receiver timeout flag */ 00351 #define USART_FLAG_TC USART_ISR_TC /*!< USART transmission complete */ 00352 #define USART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< USART read data register not empty */ 00353 #define USART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< USART RXFIFO not empty */ 00354 #define USART_FLAG_IDLE USART_ISR_IDLE /*!< USART idle flag */ 00355 #define USART_FLAG_ORE USART_ISR_ORE /*!< USART overrun error */ 00356 #define USART_FLAG_NE USART_ISR_NE /*!< USART noise error */ 00357 #define USART_FLAG_FE USART_ISR_FE /*!< USART frame error */ 00358 #define USART_FLAG_PE USART_ISR_PE /*!< USART parity error */ 00359 /** 00360 * @} 00361 */ 00362 00363 /** @defgroup USART_Interrupt_definition USART Interrupts Definition 00364 * Elements values convention: 0000ZZZZ0XXYYYYYb 00365 * - YYYYY : Interrupt source position in the XX register (5bits) 00366 * - XX : Interrupt source register (2bits) 00367 * - 01: CR1 register 00368 * - 10: CR2 register 00369 * - 11: CR3 register 00370 * - ZZZZ : Flag position in the ISR register(4bits) 00371 * @{ 00372 */ 00373 00374 #define USART_IT_PE 0x0028U /*!< USART parity error interruption */ 00375 #define USART_IT_TXE 0x0727U /*!< USART transmit data register empty interruption */ 00376 #define USART_IT_TXFNF 0x0727U /*!< USART TX FIFO not full interruption */ 00377 #define USART_IT_TC 0x0626U /*!< USART transmission complete interruption */ 00378 #define USART_IT_RXNE 0x0525U /*!< USART read data register not empty interruption */ 00379 #define USART_IT_RXFNE 0x0525U /*!< USART RXFIFO not empty interruption */ 00380 #define USART_IT_IDLE 0x0424U /*!< USART idle interruption */ 00381 #define USART_IT_ERR 0x0060U /*!< USART error interruption */ 00382 #define USART_IT_ORE 0x0300U /*!< USART overrun error interruption */ 00383 #define USART_IT_NE 0x0200U /*!< USART noise error interruption */ 00384 #define USART_IT_FE 0x0100U /*!< USART frame error interruption */ 00385 #define USART_IT_RXFF 0x183FU /*!< USART RXFIFO full interruption */ 00386 #define USART_IT_TXFE 0x173EU /*!< USART TXFIFO empty interruption */ 00387 #define USART_IT_RXFT 0x1A7CU /*!< USART RXFIFO threshold reached interruption */ 00388 #define USART_IT_TXFT 0x1B77U /*!< USART TXFIFO threshold reached interruption */ 00389 00390 /** 00391 * @} 00392 */ 00393 00394 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags 00395 * @{ 00396 */ 00397 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 00398 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 00399 #define USART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 00400 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ 00401 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 00402 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 00403 #define USART_CLEAR_UDRF USART_ICR_UDRCF /*!< SPI slave underrun error Clear Flag */ 00404 #define USART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO Empty Clear Flag */ 00405 #define USART_CLEAR_RTOF USART_ICR_RTOCF /*!< USART receiver timeout clear flag */ 00406 /** 00407 * @} 00408 */ 00409 00410 /** @defgroup USART_Interruption_Mask USART Interruption Flags Mask 00411 * @{ 00412 */ 00413 #define USART_IT_MASK 0x001FU /*!< USART interruptions flags mask */ 00414 #define USART_CR_MASK 0x00E0U /*!< USART control register mask */ 00415 #define USART_CR_POS 5U /*!< USART control register position */ 00416 #define USART_ISR_MASK 0x1F00U /*!< USART ISR register mask */ 00417 #define USART_ISR_POS 8U /*!< USART ISR register position */ 00418 /** 00419 * @} 00420 */ 00421 00422 /** 00423 * @} 00424 */ 00425 00426 /* Exported macros -----------------------------------------------------------*/ 00427 /** @defgroup USART_Exported_Macros USART Exported Macros 00428 * @{ 00429 */ 00430 00431 /** @brief Reset USART handle state. 00432 * @param __HANDLE__ USART handle. 00433 * @retval None 00434 */ 00435 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 00436 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00437 (__HANDLE__)->State = HAL_USART_STATE_RESET; \ 00438 (__HANDLE__)->MspInitCallback = NULL; \ 00439 (__HANDLE__)->MspDeInitCallback = NULL; \ 00440 } while(0U) 00441 #else 00442 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) 00443 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 00444 00445 /** @brief Check whether the specified USART flag is set or not. 00446 * @param __HANDLE__ specifies the USART Handle 00447 * @param __FLAG__ specifies the flag to check. 00448 * This parameter can be one of the following values: 00449 * @arg @ref USART_FLAG_TXFT TXFIFO threshold flag 00450 * @arg @ref USART_FLAG_RXFT RXFIFO threshold flag 00451 * @arg @ref USART_FLAG_RXFF RXFIFO Full flag 00452 * @arg @ref USART_FLAG_TXFE TXFIFO Empty flag 00453 * @arg @ref USART_FLAG_REACK Receive enable acknowledge flag 00454 * @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag 00455 * @arg @ref USART_FLAG_BUSY Busy flag 00456 * @arg @ref USART_FLAG_UDR SPI slave underrun error flag 00457 * @arg @ref USART_FLAG_TXE Transmit data register empty flag 00458 * @arg @ref USART_FLAG_TXFNF TXFIFO not full flag 00459 * @arg @ref USART_FLAG_TC Transmission Complete flag 00460 * @arg @ref USART_FLAG_RXNE Receive data register not empty flag 00461 * @arg @ref USART_FLAG_RXFNE RXFIFO not empty flag 00462 * @arg @ref USART_FLAG_RTOF Receiver Timeout flag 00463 * @arg @ref USART_FLAG_IDLE Idle Line detection flag 00464 * @arg @ref USART_FLAG_ORE OverRun Error flag 00465 * @arg @ref USART_FLAG_NE Noise Error flag 00466 * @arg @ref USART_FLAG_FE Framing Error flag 00467 * @arg @ref USART_FLAG_PE Parity Error flag 00468 * @retval The new state of __FLAG__ (TRUE or FALSE). 00469 */ 00470 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 00471 00472 /** @brief Clear the specified USART pending flag. 00473 * @param __HANDLE__ specifies the USART Handle. 00474 * @param __FLAG__ specifies the flag to check. 00475 * This parameter can be any combination of the following values: 00476 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag 00477 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag 00478 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag 00479 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag 00480 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag 00481 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag 00482 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag 00483 * @arg @ref USART_CLEAR_RTOF Receiver Timeout clear flag 00484 * @arg @ref USART_CLEAR_UDRF SPI slave underrun error Clear Flag 00485 * @retval None 00486 */ 00487 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 00488 00489 /** @brief Clear the USART PE pending flag. 00490 * @param __HANDLE__ specifies the USART Handle. 00491 * @retval None 00492 */ 00493 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF) 00494 00495 /** @brief Clear the USART FE pending flag. 00496 * @param __HANDLE__ specifies the USART Handle. 00497 * @retval None 00498 */ 00499 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF) 00500 00501 /** @brief Clear the USART NE pending flag. 00502 * @param __HANDLE__ specifies the USART Handle. 00503 * @retval None 00504 */ 00505 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF) 00506 00507 /** @brief Clear the USART ORE pending flag. 00508 * @param __HANDLE__ specifies the USART Handle. 00509 * @retval None 00510 */ 00511 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF) 00512 00513 /** @brief Clear the USART IDLE pending flag. 00514 * @param __HANDLE__ specifies the USART Handle. 00515 * @retval None 00516 */ 00517 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF) 00518 00519 /** @brief Clear the USART TX FIFO empty clear flag. 00520 * @param __HANDLE__ specifies the USART Handle. 00521 * @retval None 00522 */ 00523 #define __HAL_USART_CLEAR_TXFECF(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_TXFECF) 00524 00525 /** @brief Clear SPI slave underrun error flag. 00526 * @param __HANDLE__ specifies the USART Handle. 00527 * @retval None 00528 */ 00529 #define __HAL_USART_CLEAR_UDRFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_UDRF) 00530 00531 /** @brief Enable the specified USART interrupt. 00532 * @param __HANDLE__ specifies the USART Handle. 00533 * @param __INTERRUPT__ specifies the USART interrupt source to enable. 00534 * This parameter can be one of the following values: 00535 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 00536 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 00537 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 00538 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 00539 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 00540 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 00541 * @arg @ref USART_IT_TC Transmission complete interrupt 00542 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 00543 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 00544 * @arg @ref USART_IT_IDLE Idle line detection interrupt 00545 * @arg @ref USART_IT_PE Parity Error interrupt 00546 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error) 00547 * @retval None 00548 */ 00549 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__)\ 00550 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\ 00551 ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 00552 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\ 00553 ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 00554 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 00555 00556 /** @brief Disable the specified USART interrupt. 00557 * @param __HANDLE__ specifies the USART Handle. 00558 * @param __INTERRUPT__ specifies the USART interrupt source to disable. 00559 * This parameter can be one of the following values: 00560 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 00561 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 00562 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 00563 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 00564 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 00565 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 00566 * @arg @ref USART_IT_TC Transmission complete interrupt 00567 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 00568 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 00569 * @arg @ref USART_IT_IDLE Idle line detection interrupt 00570 * @arg @ref USART_IT_PE Parity Error interrupt 00571 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error) 00572 * @retval None 00573 */ 00574 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__)\ 00575 (((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 1U)?\ 00576 ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 00577 ((((__INTERRUPT__) & USART_CR_MASK) >> USART_CR_POS) == 2U)?\ 00578 ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ 00579 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) 00580 00581 /** @brief Check whether the specified USART interrupt has occurred or not. 00582 * @param __HANDLE__ specifies the USART Handle. 00583 * @param __INTERRUPT__ specifies the USART interrupt source to check. 00584 * This parameter can be one of the following values: 00585 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 00586 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 00587 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 00588 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 00589 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 00590 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 00591 * @arg @ref USART_IT_TC Transmission complete interrupt 00592 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 00593 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 00594 * @arg @ref USART_IT_IDLE Idle line detection interrupt 00595 * @arg @ref USART_IT_ORE OverRun Error interrupt 00596 * @arg @ref USART_IT_NE Noise Error interrupt 00597 * @arg @ref USART_IT_FE Framing Error interrupt 00598 * @arg @ref USART_IT_PE Parity Error interrupt 00599 * @retval The new state of __INTERRUPT__ (SET or RESET). 00600 */ 00601 #define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 00602 & (0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>>\ 00603 USART_ISR_POS))) != 0U) ? SET : RESET) 00604 00605 /** @brief Check whether the specified USART interrupt source is enabled or not. 00606 * @param __HANDLE__ specifies the USART Handle. 00607 * @param __INTERRUPT__ specifies the USART interrupt source to check. 00608 * This parameter can be one of the following values: 00609 * @arg @ref USART_IT_RXFF RXFIFO Full interrupt 00610 * @arg @ref USART_IT_TXFE TXFIFO Empty interrupt 00611 * @arg @ref USART_IT_RXFT RXFIFO threshold interrupt 00612 * @arg @ref USART_IT_TXFT TXFIFO threshold interrupt 00613 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt 00614 * @arg @ref USART_IT_TXFNF TX FIFO not full interrupt 00615 * @arg @ref USART_IT_TC Transmission complete interrupt 00616 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt 00617 * @arg @ref USART_IT_RXFNE RXFIFO not empty interrupt 00618 * @arg @ref USART_IT_IDLE Idle line detection interrupt 00619 * @arg @ref USART_IT_ORE OverRun Error interrupt 00620 * @arg @ref USART_IT_NE Noise Error interrupt 00621 * @arg @ref USART_IT_FE Framing Error interrupt 00622 * @arg @ref USART_IT_PE Parity Error interrupt 00623 * @retval The new state of __INTERRUPT__ (SET or RESET). 00624 */ 00625 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U) ?\ 00626 (__HANDLE__)->Instance->CR1 : \ 00627 (((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U) ?\ 00628 (__HANDLE__)->Instance->CR2 : \ 00629 (__HANDLE__)->Instance->CR3)) & (0x01U <<\ 00630 (((uint16_t)(__INTERRUPT__)) &\ 00631 USART_IT_MASK))) != 0U) ? SET : RESET) 00632 00633 /** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag. 00634 * @param __HANDLE__ specifies the USART Handle. 00635 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 00636 * to clear the corresponding interrupt. 00637 * This parameter can be one of the following values: 00638 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag 00639 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag 00640 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag 00641 * @arg @ref USART_CLEAR_OREF Overrun Error Clear Flag 00642 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag 00643 * @arg @ref USART_CLEAR_RTOF Receiver timeout clear flag 00644 * @arg @ref USART_CLEAR_TXFECF TXFIFO empty clear Flag 00645 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag 00646 * @retval None 00647 */ 00648 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 00649 00650 /** @brief Set a specific USART request flag. 00651 * @param __HANDLE__ specifies the USART Handle. 00652 * @param __REQ__ specifies the request flag to set. 00653 * This parameter can be one of the following values: 00654 * @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request 00655 * @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request 00656 * 00657 * @retval None 00658 */ 00659 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 00660 00661 /** @brief Enable the USART one bit sample method. 00662 * @param __HANDLE__ specifies the USART Handle. 00663 * @retval None 00664 */ 00665 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 00666 00667 /** @brief Disable the USART one bit sample method. 00668 * @param __HANDLE__ specifies the USART Handle. 00669 * @retval None 00670 */ 00671 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 00672 00673 /** @brief Enable USART. 00674 * @param __HANDLE__ specifies the USART Handle. 00675 * @retval None 00676 */ 00677 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 00678 00679 /** @brief Disable USART. 00680 * @param __HANDLE__ specifies the USART Handle. 00681 * @retval None 00682 */ 00683 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 00684 00685 /** 00686 * @} 00687 */ 00688 00689 /* Private macros --------------------------------------------------------*/ 00690 /** @defgroup USART_Private_Macros USART Private Macros 00691 * @{ 00692 */ 00693 00694 /** @brief Get USART clock division factor from clock prescaler value. 00695 * @param __CLOCKPRESCALER__ USART prescaler value. 00696 * @retval USART clock division factor 00697 */ 00698 #define USART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 00699 (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) ? 1U : \ 00700 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) ? 2U : \ 00701 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) ? 4U : \ 00702 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) ? 6U : \ 00703 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) ? 8U : \ 00704 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) ? 10U : \ 00705 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) ? 12U : \ 00706 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) ? 16U : \ 00707 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) ? 32U : \ 00708 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) ? 64U : \ 00709 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) ? 128U : \ 00710 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256) ? 256U : 1U) 00711 00712 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 00713 * @param __PCLK__ USART clock. 00714 * @param __BAUD__ Baud rate set by the user. 00715 * @param __CLOCKPRESCALER__ USART prescaler value. 00716 * @retval Division result 00717 */ 00718 #define USART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__)\ 00719 (((((__PCLK__)/USART_GET_DIV_FACTOR(__CLOCKPRESCALER__))*2U)\ 00720 + ((__BAUD__)/2U)) / (__BAUD__)) 00721 00722 /** @brief Report the USART clock source. 00723 * @param __HANDLE__ specifies the USART Handle. 00724 * @param __CLOCKSOURCE__ output variable. 00725 * @retval the USART clocking source, written in __CLOCKSOURCE__. 00726 */ 00727 #if defined(UART9) && defined(USART10) 00728 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00729 do { \ 00730 if((__HANDLE__)->Instance == USART1) \ 00731 { \ 00732 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00733 { \ 00734 case RCC_USART1CLKSOURCE_D2PCLK2: \ 00735 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \ 00736 break; \ 00737 case RCC_USART1CLKSOURCE_PLL2: \ 00738 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00739 break; \ 00740 case RCC_USART1CLKSOURCE_PLL3: \ 00741 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00742 break; \ 00743 case RCC_USART1CLKSOURCE_HSI: \ 00744 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00745 break; \ 00746 case RCC_USART1CLKSOURCE_CSI: \ 00747 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00748 break; \ 00749 case RCC_USART1CLKSOURCE_LSE: \ 00750 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00751 break; \ 00752 default: \ 00753 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00754 break; \ 00755 } \ 00756 } \ 00757 else if((__HANDLE__)->Instance == USART2) \ 00758 { \ 00759 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00760 { \ 00761 case RCC_USART2CLKSOURCE_D2PCLK1: \ 00762 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \ 00763 break; \ 00764 case RCC_USART2CLKSOURCE_PLL2: \ 00765 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00766 break; \ 00767 case RCC_USART2CLKSOURCE_PLL3: \ 00768 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00769 break; \ 00770 case RCC_USART2CLKSOURCE_HSI: \ 00771 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00772 break; \ 00773 case RCC_USART2CLKSOURCE_CSI: \ 00774 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00775 break; \ 00776 case RCC_USART2CLKSOURCE_LSE: \ 00777 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00778 break; \ 00779 default: \ 00780 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00781 break; \ 00782 } \ 00783 } \ 00784 else if((__HANDLE__)->Instance == USART3) \ 00785 { \ 00786 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00787 { \ 00788 case RCC_USART3CLKSOURCE_D2PCLK1: \ 00789 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \ 00790 break; \ 00791 case RCC_USART3CLKSOURCE_PLL2: \ 00792 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00793 break; \ 00794 case RCC_USART3CLKSOURCE_PLL3: \ 00795 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00796 break; \ 00797 case RCC_USART3CLKSOURCE_HSI: \ 00798 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00799 break; \ 00800 case RCC_USART3CLKSOURCE_CSI: \ 00801 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00802 break; \ 00803 case RCC_USART3CLKSOURCE_LSE: \ 00804 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00805 break; \ 00806 default: \ 00807 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00808 break; \ 00809 } \ 00810 } \ 00811 else if((__HANDLE__)->Instance == USART6) \ 00812 { \ 00813 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 00814 { \ 00815 case RCC_USART6CLKSOURCE_D2PCLK2: \ 00816 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \ 00817 break; \ 00818 case RCC_USART6CLKSOURCE_PLL2: \ 00819 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00820 break; \ 00821 case RCC_USART6CLKSOURCE_PLL3: \ 00822 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00823 break; \ 00824 case RCC_USART6CLKSOURCE_HSI: \ 00825 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00826 break; \ 00827 case RCC_USART6CLKSOURCE_CSI: \ 00828 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00829 break; \ 00830 case RCC_USART6CLKSOURCE_LSE: \ 00831 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00832 break; \ 00833 default: \ 00834 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00835 break; \ 00836 } \ 00837 } \ 00838 else if((__HANDLE__)->Instance == USART10) \ 00839 { \ 00840 switch(__HAL_RCC_GET_USART10_SOURCE()) \ 00841 { \ 00842 case RCC_USART10CLKSOURCE_D2PCLK2: \ 00843 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \ 00844 break; \ 00845 case RCC_USART10CLKSOURCE_PLL2: \ 00846 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00847 break; \ 00848 case RCC_USART10CLKSOURCE_PLL3: \ 00849 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00850 break; \ 00851 case RCC_USART10CLKSOURCE_HSI: \ 00852 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00853 break; \ 00854 case RCC_USART10CLKSOURCE_CSI: \ 00855 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00856 break; \ 00857 case RCC_USART10CLKSOURCE_LSE: \ 00858 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00859 break; \ 00860 default: \ 00861 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00862 break; \ 00863 } \ 00864 } \ 00865 else \ 00866 { \ 00867 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00868 } \ 00869 } while(0U) 00870 #else 00871 #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 00872 do { \ 00873 if((__HANDLE__)->Instance == USART1) \ 00874 { \ 00875 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 00876 { \ 00877 case RCC_USART1CLKSOURCE_D2PCLK2: \ 00878 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \ 00879 break; \ 00880 case RCC_USART1CLKSOURCE_PLL2: \ 00881 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00882 break; \ 00883 case RCC_USART1CLKSOURCE_PLL3: \ 00884 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00885 break; \ 00886 case RCC_USART1CLKSOURCE_HSI: \ 00887 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00888 break; \ 00889 case RCC_USART1CLKSOURCE_CSI: \ 00890 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00891 break; \ 00892 case RCC_USART1CLKSOURCE_LSE: \ 00893 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00894 break; \ 00895 default: \ 00896 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00897 break; \ 00898 } \ 00899 } \ 00900 else if((__HANDLE__)->Instance == USART2) \ 00901 { \ 00902 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 00903 { \ 00904 case RCC_USART2CLKSOURCE_D2PCLK1: \ 00905 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \ 00906 break; \ 00907 case RCC_USART2CLKSOURCE_PLL2: \ 00908 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00909 break; \ 00910 case RCC_USART2CLKSOURCE_PLL3: \ 00911 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00912 break; \ 00913 case RCC_USART2CLKSOURCE_HSI: \ 00914 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00915 break; \ 00916 case RCC_USART2CLKSOURCE_CSI: \ 00917 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00918 break; \ 00919 case RCC_USART2CLKSOURCE_LSE: \ 00920 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00921 break; \ 00922 default: \ 00923 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00924 break; \ 00925 } \ 00926 } \ 00927 else if((__HANDLE__)->Instance == USART3) \ 00928 { \ 00929 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 00930 { \ 00931 case RCC_USART3CLKSOURCE_D2PCLK1: \ 00932 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK1; \ 00933 break; \ 00934 case RCC_USART3CLKSOURCE_PLL2: \ 00935 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00936 break; \ 00937 case RCC_USART3CLKSOURCE_PLL3: \ 00938 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00939 break; \ 00940 case RCC_USART3CLKSOURCE_HSI: \ 00941 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00942 break; \ 00943 case RCC_USART3CLKSOURCE_CSI: \ 00944 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00945 break; \ 00946 case RCC_USART3CLKSOURCE_LSE: \ 00947 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00948 break; \ 00949 default: \ 00950 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00951 break; \ 00952 } \ 00953 } \ 00954 else if((__HANDLE__)->Instance == USART6) \ 00955 { \ 00956 switch(__HAL_RCC_GET_USART6_SOURCE()) \ 00957 { \ 00958 case RCC_USART6CLKSOURCE_D2PCLK2: \ 00959 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_D2PCLK2; \ 00960 break; \ 00961 case RCC_USART6CLKSOURCE_PLL2: \ 00962 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL2; \ 00963 break; \ 00964 case RCC_USART6CLKSOURCE_PLL3: \ 00965 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PLL3; \ 00966 break; \ 00967 case RCC_USART6CLKSOURCE_HSI: \ 00968 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ 00969 break; \ 00970 case RCC_USART6CLKSOURCE_CSI: \ 00971 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_CSI; \ 00972 break; \ 00973 case RCC_USART6CLKSOURCE_LSE: \ 00974 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ 00975 break; \ 00976 default: \ 00977 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00978 break; \ 00979 } \ 00980 } \ 00981 else \ 00982 { \ 00983 (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ 00984 } \ 00985 } while(0U) 00986 #endif /* UART9 && USART10 */ 00987 00988 /** @brief Check USART Baud rate. 00989 * @param __BAUDRATE__ Baudrate specified by the user. 00990 * The maximum Baud Rate is derived from the maximum clock on H7 (i.e. 100 MHz) 00991 * divided by the smallest oversampling used on the USART (i.e. 8) 00992 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) */ 00993 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U) 00994 00995 /** 00996 * @brief Ensure that USART frame number of stop bits is valid. 00997 * @param __STOPBITS__ USART frame number of stop bits. 00998 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 00999 */ 01000 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \ 01001 ((__STOPBITS__) == USART_STOPBITS_1) || \ 01002 ((__STOPBITS__) == USART_STOPBITS_1_5) || \ 01003 ((__STOPBITS__) == USART_STOPBITS_2)) 01004 01005 /** 01006 * @brief Ensure that USART frame parity is valid. 01007 * @param __PARITY__ USART frame parity. 01008 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 01009 */ 01010 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \ 01011 ((__PARITY__) == USART_PARITY_EVEN) || \ 01012 ((__PARITY__) == USART_PARITY_ODD)) 01013 01014 /** 01015 * @brief Ensure that USART communication mode is valid. 01016 * @param __MODE__ USART communication mode. 01017 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 01018 */ 01019 #define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U)) 01020 01021 /** 01022 * @brief Ensure that USART clock state is valid. 01023 * @param __CLOCK__ USART clock state. 01024 * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid) 01025 */ 01026 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \ 01027 ((__CLOCK__) == USART_CLOCK_ENABLE)) 01028 01029 /** 01030 * @brief Ensure that USART frame polarity is valid. 01031 * @param __CPOL__ USART frame polarity. 01032 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid) 01033 */ 01034 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH)) 01035 01036 /** 01037 * @brief Ensure that USART frame phase is valid. 01038 * @param __CPHA__ USART frame phase. 01039 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid) 01040 */ 01041 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE)) 01042 01043 /** 01044 * @brief Ensure that USART frame last bit clock pulse setting is valid. 01045 * @param __LASTBIT__ USART frame last bit clock pulse setting. 01046 * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid) 01047 */ 01048 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \ 01049 ((__LASTBIT__) == USART_LASTBIT_ENABLE)) 01050 01051 /** 01052 * @brief Ensure that USART request parameter is valid. 01053 * @param __PARAM__ USART request parameter. 01054 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 01055 */ 01056 #define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \ 01057 ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST)) 01058 01059 /** 01060 * @brief Ensure that USART Prescaler is valid. 01061 * @param __CLOCKPRESCALER__ USART Prescaler value. 01062 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 01063 */ 01064 #define IS_USART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == USART_PRESCALER_DIV1) || \ 01065 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV2) || \ 01066 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV4) || \ 01067 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV6) || \ 01068 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV8) || \ 01069 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV10) || \ 01070 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV12) || \ 01071 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV16) || \ 01072 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV32) || \ 01073 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV64) || \ 01074 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV128) || \ 01075 ((__CLOCKPRESCALER__) == USART_PRESCALER_DIV256)) 01076 01077 /** 01078 * @} 01079 */ 01080 01081 /* Include USART HAL Extended module */ 01082 #include "stm32h7xx_hal_usart_ex.h" 01083 01084 /* Exported functions --------------------------------------------------------*/ 01085 /** @addtogroup USART_Exported_Functions USART Exported Functions 01086 * @{ 01087 */ 01088 01089 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions 01090 * @{ 01091 */ 01092 01093 /* Initialization and de-initialization functions ****************************/ 01094 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); 01095 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); 01096 void HAL_USART_MspInit(USART_HandleTypeDef *husart); 01097 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); 01098 01099 /* Callbacks Register/UnRegister functions ***********************************/ 01100 #if (USE_HAL_USART_REGISTER_CALLBACKS == 1) 01101 HAL_StatusTypeDef HAL_USART_RegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID, 01102 pUSART_CallbackTypeDef pCallback); 01103 HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_USART_CallbackIDTypeDef CallbackID); 01104 #endif /* USE_HAL_USART_REGISTER_CALLBACKS */ 01105 01106 /** 01107 * @} 01108 */ 01109 01110 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions 01111 * @{ 01112 */ 01113 01114 /* IO operation functions *****************************************************/ 01115 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, uint32_t Timeout); 01116 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); 01117 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, 01118 uint16_t Size, uint32_t Timeout); 01119 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size); 01120 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); 01121 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, 01122 uint16_t Size); 01123 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size); 01124 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); 01125 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, 01126 uint16_t Size); 01127 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); 01128 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); 01129 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); 01130 /* Transfer Abort functions */ 01131 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart); 01132 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart); 01133 01134 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); 01135 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); 01136 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); 01137 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); 01138 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); 01139 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); 01140 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); 01141 void HAL_USART_AbortCpltCallback(USART_HandleTypeDef *husart); 01142 01143 /** 01144 * @} 01145 */ 01146 01147 /** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions 01148 * @{ 01149 */ 01150 01151 /* Peripheral State and Error functions ***************************************/ 01152 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); 01153 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); 01154 01155 /** 01156 * @} 01157 */ 01158 01159 /** 01160 * @} 01161 */ 01162 01163 /** 01164 * @} 01165 */ 01166 01167 /** 01168 * @} 01169 */ 01170 01171 #ifdef __cplusplus 01172 } 01173 #endif 01174 01175 #endif /* STM32H7xx_HAL_USART_H */ 01176
1.7.6.1