STM32L443xx HAL User Manual: stm32l4xx

This file contains all the functions prototypes for the HAL module driver. More...

#include "stm32l4xx_hal_conf.h"

Defines
#define	SYSCFG_BOOT_MAINFLASH 0U
#define	SYSCFG_BOOT_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0
#define	SYSCFG_BOOT_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 \| SYSCFG_MEMRMP_MEM_MODE_0)
#define	SYSCFG_BOOT_QUADSPI (SYSCFG_MEMRMP_MEM_MODE_2 \| SYSCFG_MEMRMP_MEM_MODE_1)
#define	SYSCFG_IT_FPU_IOC SYSCFG_CFGR1_FPU_IE_0
#define	SYSCFG_IT_FPU_DZC SYSCFG_CFGR1_FPU_IE_1
#define	SYSCFG_IT_FPU_UFC SYSCFG_CFGR1_FPU_IE_2
#define	SYSCFG_IT_FPU_OFC SYSCFG_CFGR1_FPU_IE_3
#define	SYSCFG_IT_FPU_IDC SYSCFG_CFGR1_FPU_IE_4
#define	SYSCFG_IT_FPU_IXC SYSCFG_CFGR1_FPU_IE_5
#define	SYSCFG_SRAM2WRP_PAGE0 SYSCFG_SWPR_PAGE0
#define	SYSCFG_SRAM2WRP_PAGE1 SYSCFG_SWPR_PAGE1
#define	SYSCFG_SRAM2WRP_PAGE2 SYSCFG_SWPR_PAGE2
#define	SYSCFG_SRAM2WRP_PAGE3 SYSCFG_SWPR_PAGE3
#define	SYSCFG_SRAM2WRP_PAGE4 SYSCFG_SWPR_PAGE4
#define	SYSCFG_SRAM2WRP_PAGE5 SYSCFG_SWPR_PAGE5
#define	SYSCFG_SRAM2WRP_PAGE6 SYSCFG_SWPR_PAGE6
#define	SYSCFG_SRAM2WRP_PAGE7 SYSCFG_SWPR_PAGE7
#define	SYSCFG_SRAM2WRP_PAGE8 SYSCFG_SWPR_PAGE8
#define	SYSCFG_SRAM2WRP_PAGE9 SYSCFG_SWPR_PAGE9
#define	SYSCFG_SRAM2WRP_PAGE10 SYSCFG_SWPR_PAGE10
#define	SYSCFG_SRAM2WRP_PAGE11 SYSCFG_SWPR_PAGE11
#define	SYSCFG_SRAM2WRP_PAGE12 SYSCFG_SWPR_PAGE12
#define	SYSCFG_SRAM2WRP_PAGE13 SYSCFG_SWPR_PAGE13
#define	SYSCFG_SRAM2WRP_PAGE14 SYSCFG_SWPR_PAGE14
#define	SYSCFG_SRAM2WRP_PAGE15 SYSCFG_SWPR_PAGE15
#define	SYSCFG_VREFBUF_VOLTAGE_SCALE0 0U
#define	SYSCFG_VREFBUF_VOLTAGE_SCALE1 VREFBUF_CSR_VRS
#define	SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE 0U
#define	SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE VREFBUF_CSR_HIZ
#define	SYSCFG_FLAG_SRAM2_PE SYSCFG_CFGR2_SPF
#define	SYSCFG_FLAG_SRAM2_BUSY SYSCFG_SCSR_SRAM2BSY
#define	SYSCFG_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP
	Fast-mode Plus driving capability on a specific GPIO.
#define	SYSCFG_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP
#define	SYSCFG_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP
#define	SYSCFG_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP
#define	__HAL_DBGMCU_FREEZE_TIM2() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP)
	Freeze/Unfreeze Peripherals in Debug mode.
#define	__HAL_DBGMCU_UNFREEZE_TIM2() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM2_STOP)
#define	__HAL_DBGMCU_FREEZE_TIM6() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP)
#define	__HAL_DBGMCU_UNFREEZE_TIM6() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM6_STOP)
#define	__HAL_DBGMCU_FREEZE_TIM7() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP)
#define	__HAL_DBGMCU_UNFREEZE_TIM7() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_TIM7_STOP)
#define	__HAL_DBGMCU_FREEZE_RTC() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP)
#define	__HAL_DBGMCU_UNFREEZE_RTC() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_RTC_STOP)
#define	__HAL_DBGMCU_FREEZE_WWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP)
#define	__HAL_DBGMCU_UNFREEZE_WWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_WWDG_STOP)
#define	__HAL_DBGMCU_FREEZE_IWDG() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP)
#define	__HAL_DBGMCU_UNFREEZE_IWDG() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_IWDG_STOP)
#define	__HAL_DBGMCU_FREEZE_I2C1_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP)
#define	__HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C1_STOP)
#define	__HAL_DBGMCU_FREEZE_I2C2_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP)
#define	__HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C2_STOP)
#define	__HAL_DBGMCU_FREEZE_I2C3_TIMEOUT() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP)
#define	__HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_I2C3_STOP)
#define	__HAL_DBGMCU_FREEZE_CAN1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP)
#define	__HAL_DBGMCU_UNFREEZE_CAN1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_CAN_STOP)
#define	__HAL_DBGMCU_FREEZE_LPTIM1() SET_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP)
#define	__HAL_DBGMCU_UNFREEZE_LPTIM1() CLEAR_BIT(DBGMCU->APB1FZR1, DBGMCU_APB1FZR1_DBG_LPTIM1_STOP)
#define	__HAL_DBGMCU_FREEZE_LPTIM2() SET_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)
#define	__HAL_DBGMCU_UNFREEZE_LPTIM2() CLEAR_BIT(DBGMCU->APB1FZR2, DBGMCU_APB1FZR2_DBG_LPTIM2_STOP)
#define	__HAL_DBGMCU_FREEZE_TIM1() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP)
#define	__HAL_DBGMCU_UNFREEZE_TIM1() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM1_STOP)
#define	__HAL_DBGMCU_FREEZE_TIM15() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP)
#define	__HAL_DBGMCU_UNFREEZE_TIM15() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM15_STOP)
#define	__HAL_DBGMCU_FREEZE_TIM16() SET_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP)
#define	__HAL_DBGMCU_UNFREEZE_TIM16() CLEAR_BIT(DBGMCU->APB2FZ, DBGMCU_APB2FZ_DBG_TIM16_STOP)
#define	__HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
	Main Flash memory mapped at 0x00000000.
#define	__HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, SYSCFG_MEMRMP_MEM_MODE_0)
	System Flash memory mapped at 0x00000000.
#define	__HAL_SYSCFG_REMAPMEMORY_SRAM() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_1\|SYSCFG_MEMRMP_MEM_MODE_0))
	Embedded SRAM mapped at 0x00000000.
#define	__HAL_SYSCFG_REMAPMEMORY_QUADSPI() MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, (SYSCFG_MEMRMP_MEM_MODE_2\|SYSCFG_MEMRMP_MEM_MODE_1))
	QUADSPI mapped at 0x00000000.
#define	__HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)
	Return the boot mode as configured by user.
#define	__HAL_SYSCFG_SRAM2_WRP_1_31_ENABLE(__SRAM2WRP__)
	SRAM2 page 0 to 31 write protection enable macro.
#define	__HAL_SYSCFG_SRAM2_WRP_UNLOCK()
	SRAM2 page write protection unlock prior to erase.
#define	__HAL_SYSCFG_SRAM2_ERASE() SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_SRAM2ER)
	SRAM2 erase.
#define	__HAL_SYSCFG_FPU_INTERRUPT_ENABLE(__INTERRUPT__)
	Floating Point Unit interrupt enable/disable macros.
#define	__HAL_SYSCFG_FPU_INTERRUPT_DISABLE(__INTERRUPT__)
#define	__HAL_SYSCFG_BREAK_ECC_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_ECCL)
	SYSCFG Break ECC lock.
#define	__HAL_SYSCFG_BREAK_LOCKUP_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CLL)
	SYSCFG Break Cortex-M4 Lockup lock.
#define	__HAL_SYSCFG_BREAK_PVD_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_PVDL)
	SYSCFG Break PVD lock.
#define	__HAL_SYSCFG_BREAK_SRAM2PARITY_LOCK() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPL)
	SYSCFG Break SRAM2 parity lock.
#define	__HAL_SYSCFG_GET_FLAG(__FLAG__) ((((((__FLAG__) == SYSCFG_SCSR_SRAM2BSY)? SYSCFG->SCSR : SYSCFG->CFGR2) & (__FLAG__))!= 0U) ? 1U : 0U)
	Check SYSCFG flag is set or not.
#define	__HAL_SYSCFG_CLEAR_FLAG() SET_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_SPF)
	Set the SPF bit to clear the SRAM Parity Error Flag.
#define	__HAL_SYSCFG_FASTMODEPLUS_ENABLE(__FASTMODEPLUS__)
	Fast-mode Plus driving capability enable/disable macros.
#define	__HAL_SYSCFG_FASTMODEPLUS_DISABLE(__FASTMODEPLUS__)
#define	IS_SYSCFG_FPU_INTERRUPT(__INTERRUPT__)
#define	IS_SYSCFG_BREAK_CONFIG(__CONFIG__)
#define	IS_SYSCFG_SRAM2WRP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0xFFFFFFFFUL))
#define	IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(__SCALE__)
#define	IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(__VALUE__)
#define	IS_SYSCFG_VREFBUF_TRIMMING(__VALUE__) (((__VALUE__) > 0U) && ((__VALUE__) <= VREFBUF_CCR_TRIM))
#define	IS_SYSCFG_FASTMODEPLUS(__PIN__)
Enumerations
enum	HAL_TickFreqTypeDef { HAL_TICK_FREQ_10HZ = 100U, HAL_TICK_FREQ_100HZ = 10U, HAL_TICK_FREQ_1KHZ = 1U, HAL_TICK_FREQ_DEFAULT = HAL_TICK_FREQ_1KHZ }
Functions
HAL_StatusTypeDef	HAL_Init (void)
	Configure the Flash prefetch, the Instruction and Data caches, the time base source, NVIC and any required global low level hardware by calling the HAL_MspInit() callback function to be optionally defined in user file stm32l4xx_hal_msp.c.
HAL_StatusTypeDef	HAL_DeInit (void)
	De-initialize common part of the HAL and stop the source of time base.
__weak void	HAL_MspInit (void)
	Initialize the MSP.
__weak void	HAL_MspDeInit (void)
	DeInitialize the MSP.
__weak HAL_StatusTypeDef	HAL_InitTick (uint32_t TickPriority)
	This function configures the source of the time base: The time source is configured to have 1ms time base with a dedicated Tick interrupt priority.
__weak void	HAL_IncTick (void)
	This function is called to increment a global variable "uwTick" used as application time base.
__weak void	HAL_Delay (uint32_t Delay)
	This function provides minimum delay (in milliseconds) based on variable incremented.
__weak uint32_t	HAL_GetTick (void)
	Provide a tick value in millisecond.
uint32_t	HAL_GetTickPrio (void)
	This function returns a tick priority.
HAL_StatusTypeDef	HAL_SetTickFreq (HAL_TickFreqTypeDef Freq)
	Set new tick Freq.
HAL_TickFreqTypeDef	HAL_GetTickFreq (void)
	Return tick frequency.
__weak void	HAL_SuspendTick (void)
	Suspend Tick increment.
__weak void	HAL_ResumeTick (void)
	Resume Tick increment.
uint32_t	HAL_GetHalVersion (void)
	Return the HAL revision.
uint32_t	HAL_GetREVID (void)
	Return the device revision identifier.
uint32_t	HAL_GetDEVID (void)
	Return the device identifier.
uint32_t	HAL_GetUIDw0 (void)
	Return the first word of the unique device identifier (UID based on 96 bits)
uint32_t	HAL_GetUIDw1 (void)
	Return the second word of the unique device identifier (UID based on 96 bits)
uint32_t	HAL_GetUIDw2 (void)
	Return the third word of the unique device identifier (UID based on 96 bits)
void	HAL_DBGMCU_EnableDBGSleepMode (void)
	Enable the Debug Module during SLEEP mode.
void	HAL_DBGMCU_DisableDBGSleepMode (void)
	Disable the Debug Module during SLEEP mode.
void	HAL_DBGMCU_EnableDBGStopMode (void)
	Enable the Debug Module during STOP0/STOP1/STOP2 modes.
void	HAL_DBGMCU_DisableDBGStopMode (void)
	Disable the Debug Module during STOP0/STOP1/STOP2 modes.
void	HAL_DBGMCU_EnableDBGStandbyMode (void)
	Enable the Debug Module during STANDBY mode.
void	HAL_DBGMCU_DisableDBGStandbyMode (void)
	Disable the Debug Module during STANDBY mode.
void	HAL_SYSCFG_SRAM2Erase (void)
	Start a hardware SRAM2 erase operation.
void	HAL_SYSCFG_EnableMemorySwappingBank (void)
	Enable the Internal FLASH Bank Swapping.
void	HAL_SYSCFG_DisableMemorySwappingBank (void)
	Disable the Internal FLASH Bank Swapping.
void	HAL_SYSCFG_VREFBUF_VoltageScalingConfig (uint32_t VoltageScaling)
	Configure the internal voltage reference buffer voltage scale.
void	HAL_SYSCFG_VREFBUF_HighImpedanceConfig (uint32_t Mode)
	Configure the internal voltage reference buffer high impedance mode.
void	HAL_SYSCFG_VREFBUF_TrimmingConfig (uint32_t TrimmingValue)
	Tune the Internal Voltage Reference buffer (VREFBUF).
HAL_StatusTypeDef	HAL_SYSCFG_EnableVREFBUF (void)
	Enable the Internal Voltage Reference buffer (VREFBUF).
void	HAL_SYSCFG_DisableVREFBUF (void)
	Disable the Internal Voltage Reference buffer (VREFBUF).
void	HAL_SYSCFG_EnableIOAnalogSwitchBooster (void)
	Enable the I/O analog switch voltage booster.
void	HAL_SYSCFG_DisableIOAnalogSwitchBooster (void)
	Disable the I/O analog switch voltage booster.
Variables
__IO uint32_t	uwTick
uint32_t	uwTickPrio
HAL_TickFreqTypeDef	uwTickFreq

Detailed Description

This file contains all the functions prototypes for the HAL module driver.

Author:: MCD Application Team

Attention:

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS.

Definition in file stm32l4xx_hal.h.

Defines

Enumerations

Functions

Variables

Detailed Description