STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_rng_ex.c 00004 * @author MCD Application Team 00005 * @brief Extended RNG HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the Random Number Generator (RNG) peripheral: 00008 * + Lock configuration functions 00009 * + Reset the RNG 00010 * 00011 ****************************************************************************** 00012 * @attention 00013 * 00014 * Copyright (c) 2017 STMicroelectronics. 00015 * All rights reserved. 00016 * 00017 * This software is licensed under terms that can be found in the LICENSE file 00018 * in the root directory of this software component. 00019 * If no LICENSE file comes with this software, it is provided AS-IS. 00020 * 00021 ****************************************************************************** 00022 */ 00023 00024 /* Includes ------------------------------------------------------------------*/ 00025 #include "stm32l4xx_hal.h" 00026 00027 /** @addtogroup STM32L4xx_HAL_Driver 00028 * @{ 00029 */ 00030 00031 #if defined (RNG) 00032 00033 /** @addtogroup RNGEx 00034 * @brief RNG Extended HAL module driver. 00035 * @{ 00036 */ 00037 00038 #ifdef HAL_RNG_MODULE_ENABLED 00039 #if defined (RNG_CR_CONDRST) 00040 00041 /* Private types -------------------------------------------------------------*/ 00042 /* Private defines -----------------------------------------------------------*/ 00043 00044 #if defined(RNG_VER_3_2) || defined(RNG_VER_3_1) || defined(RNG_VER_3_0) 00045 /** @addtogroup RNGEx_Private_Defines 00046 * @{ 00047 */ 00048 /* Health test control register information to use in CCM algorithm are defined in CMSIS Device file. 00049 - RNG_HTCFG : Default HTCR register value for best latency and NIST Compliance 00050 - RNG_HTCFG_1 : Magic number value that must be written to RNG_HTCR register 00051 immediately before reading or writing RNG_HTCR register */ 00052 /** 00053 * @} 00054 */ 00055 #endif 00056 00057 /* Private variables ---------------------------------------------------------*/ 00058 /* Private constants ---------------------------------------------------------*/ 00059 /** @defgroup RNGEx_Private_Constants RNG Private Constants 00060 * @{ 00061 */ 00062 #define RNG_TIMEOUT_VALUE 2U 00063 /** 00064 * @} 00065 */ 00066 /* Private macros ------------------------------------------------------------*/ 00067 /* Private functions prototypes ----------------------------------------------*/ 00068 /* Private functions ---------------------------------------------------------*/ 00069 /* Exported functions --------------------------------------------------------*/ 00070 00071 /** @addtogroup RNGEx_Exported_Functions 00072 * @{ 00073 */ 00074 00075 /** @addtogroup RNGEx_Exported_Functions_Group1 00076 * @brief Configuration functions 00077 * 00078 @verbatim 00079 =============================================================================== 00080 ##### Configuration and lock functions ##### 00081 =============================================================================== 00082 [..] This section provides functions allowing to: 00083 (+) Configure the RNG with the specified parameters in the RNG_ConfigTypeDef 00084 (+) Lock RNG configuration Allows user to lock a configuration until next reset. 00085 00086 @endverbatim 00087 * @{ 00088 */ 00089 00090 /** 00091 * @brief Configure the RNG with the specified parameters in the 00092 * RNG_ConfigTypeDef. 00093 * @param hrng pointer to a RNG_HandleTypeDef structure that contains 00094 * the configuration information for RNG. 00095 * @param pConf pointer to a RNG_ConfigTypeDef structure that contains 00096 * the configuration information for RNG module 00097 00098 * @retval HAL status 00099 */ 00100 HAL_StatusTypeDef HAL_RNGEx_SetConfig(RNG_HandleTypeDef *hrng, RNG_ConfigTypeDef *pConf) 00101 { 00102 uint32_t tickstart; 00103 uint32_t cr_value; 00104 HAL_StatusTypeDef status ; 00105 00106 /* Check the RNG handle allocation */ 00107 if ((hrng == NULL)||(pConf == NULL)) 00108 { 00109 return HAL_ERROR; 00110 } 00111 00112 /* Check the parameters */ 00113 assert_param(IS_RNG_ALL_INSTANCE(hrng->Instance)); 00114 assert_param(IS_RNG_CLOCK_DIVIDER(pConf->ClockDivider)); 00115 assert_param(IS_RNG_NIST_COMPLIANCE(pConf->NistCompliance)); 00116 assert_param(IS_RNG_CONFIG1(pConf->Config1)); 00117 assert_param(IS_RNG_CONFIG2(pConf->Config2)); 00118 assert_param(IS_RNG_CONFIG3(pConf->Config3)); 00119 00120 /* Check RNG peripheral state */ 00121 if (hrng->State == HAL_RNG_STATE_READY) 00122 { 00123 /* Change RNG peripheral state */ 00124 hrng->State = HAL_RNG_STATE_BUSY; 00125 00126 /* Disable RNG */ 00127 __HAL_RNG_DISABLE(hrng); 00128 00129 /* RNG CR register configuration. Set value in CR register for : 00130 - NIST Compliance setting 00131 - Clock divider value 00132 - CONFIG 1, CONFIG 2 and CONFIG 3 values */ 00133 00134 cr_value = (uint32_t) ( pConf->ClockDivider | pConf->NistCompliance 00135 | (pConf->Config1 << RNG_CR_RNG_CONFIG1_Pos) 00136 | (pConf->Config2 << RNG_CR_RNG_CONFIG2_Pos) 00137 | (pConf->Config3 << RNG_CR_RNG_CONFIG3_Pos)); 00138 00139 MODIFY_REG(hrng->Instance->CR, RNG_CR_NISTC | RNG_CR_CLKDIV | RNG_CR_RNG_CONFIG1 00140 | RNG_CR_RNG_CONFIG2 | RNG_CR_RNG_CONFIG3, 00141 (uint32_t) (RNG_CR_CONDRST | cr_value)); 00142 00143 #if defined(RNG_VER_3_2) || defined(RNG_VER_3_1) || defined(RNG_VER_3_0) 00144 /*!< magic number must be written immediately before to RNG_HTCRG */ 00145 WRITE_REG(hrng->Instance->HTCR, RNG_HTCFG_1); 00146 /* for best latency and to be compliant with NIST */ 00147 WRITE_REG(hrng->Instance->HTCR, RNG_HTCFG); 00148 #endif 00149 00150 /* Writing bits CONDRST=0*/ 00151 CLEAR_BIT(hrng->Instance->CR, RNG_CR_CONDRST); 00152 /* Get tick */ 00153 tickstart = HAL_GetTick(); 00154 00155 /* Wait for conditioning reset process to be completed */ 00156 while(HAL_IS_BIT_SET(hrng->Instance->CR, RNG_CR_CONDRST)) 00157 { 00158 if((HAL_GetTick() - tickstart ) > RNG_TIMEOUT_VALUE) 00159 { 00160 hrng->State = HAL_RNG_STATE_READY; 00161 hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT; 00162 return HAL_ERROR; 00163 } 00164 } 00165 00166 /* Enable RNG */ 00167 __HAL_RNG_ENABLE(hrng); 00168 00169 /* Initialize the RNG state */ 00170 hrng->State = HAL_RNG_STATE_READY; 00171 00172 /* function status */ 00173 status = HAL_OK; 00174 } 00175 else 00176 { 00177 hrng->ErrorCode = HAL_RNG_ERROR_BUSY; 00178 status = HAL_ERROR; 00179 } 00180 00181 /* Return the function status */ 00182 return status; 00183 } 00184 00185 /** 00186 * @brief Get the RNG Configuration and fill parameters in the 00187 * RNG_ConfigTypeDef. 00188 * @param hrng pointer to a RNG_HandleTypeDef structure that contains 00189 * the configuration information for RNG. 00190 * @param pConf pointer to a RNG_ConfigTypeDef structure that contains 00191 * the configuration information for RNG module 00192 00193 * @retval HAL status 00194 */ 00195 HAL_StatusTypeDef HAL_RNGEx_GetConfig(RNG_HandleTypeDef *hrng, RNG_ConfigTypeDef *pConf) 00196 { 00197 00198 HAL_StatusTypeDef status ; 00199 00200 /* Check the RNG handle allocation */ 00201 if ((hrng == NULL)||(pConf == NULL)) 00202 { 00203 return HAL_ERROR; 00204 } 00205 00206 /* Check RNG peripheral state */ 00207 if (hrng->State == HAL_RNG_STATE_READY) 00208 { 00209 /* Change RNG peripheral state */ 00210 hrng->State = HAL_RNG_STATE_BUSY; 00211 00212 /* Get RNG parameters */ 00213 pConf->Config1 = (uint32_t) ((hrng->Instance->CR & RNG_CR_RNG_CONFIG1) >> RNG_CR_RNG_CONFIG1_Pos) ; 00214 pConf->Config2 = (uint32_t) ((hrng->Instance->CR & RNG_CR_RNG_CONFIG2) >> RNG_CR_RNG_CONFIG2_Pos); 00215 pConf->Config3 = (uint32_t)((hrng->Instance->CR & RNG_CR_RNG_CONFIG3) >> RNG_CR_RNG_CONFIG3_Pos); 00216 pConf->ClockDivider = (hrng->Instance->CR & RNG_CR_CLKDIV); 00217 pConf->NistCompliance = (hrng->Instance->CR & RNG_CR_NISTC); 00218 00219 /* Initialize the RNG state */ 00220 hrng->State = HAL_RNG_STATE_READY; 00221 00222 /* function status */ 00223 status = HAL_OK; 00224 } 00225 else 00226 { 00227 hrng->ErrorCode |= HAL_RNG_ERROR_BUSY; 00228 status = HAL_ERROR; 00229 } 00230 00231 /* Return the function status */ 00232 return status; 00233 } 00234 00235 /** 00236 * @brief RNG current configuration lock. 00237 * @note This function allows to lock RNG peripheral configuration. 00238 * Once locked, HW RNG reset has to be perfomed prior any further 00239 * configuration update. 00240 * @param hrng pointer to a RNG_HandleTypeDef structure that contains 00241 * the configuration information for RNG. 00242 * @retval HAL status 00243 */ 00244 HAL_StatusTypeDef HAL_RNGEx_LockConfig(RNG_HandleTypeDef *hrng) 00245 { 00246 HAL_StatusTypeDef status; 00247 00248 /* Check the RNG handle allocation */ 00249 if (hrng == NULL) 00250 { 00251 return HAL_ERROR; 00252 } 00253 00254 /* Check RNG peripheral state */ 00255 if(hrng->State == HAL_RNG_STATE_READY) 00256 { 00257 /* Change RNG peripheral state */ 00258 hrng->State = HAL_RNG_STATE_BUSY; 00259 00260 /* Perform RNG configuration Lock */ 00261 MODIFY_REG(hrng->Instance->CR, RNG_CR_CONFIGLOCK, RNG_CR_CONFIGLOCK); 00262 00263 /* Change RNG peripheral state */ 00264 hrng->State = HAL_RNG_STATE_READY; 00265 00266 /* function status */ 00267 status = HAL_OK; 00268 } 00269 else 00270 { 00271 hrng->ErrorCode = HAL_RNG_ERROR_BUSY; 00272 status = HAL_ERROR; 00273 } 00274 00275 /* Return the function status */ 00276 return status; 00277 } 00278 00279 00280 /** 00281 * @} 00282 */ 00283 00284 /** 00285 * @} 00286 */ 00287 00288 #endif /* CONDRST */ 00289 #endif /* HAL_RNG_MODULE_ENABLED */ 00290 /** 00291 * @} 00292 */ 00293 00294 #endif /* RNG */ 00295 00296 /** 00297 * @} 00298 */