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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_uart.h 00004 * @author MCD Application Team 00005 * @brief Header file of UART HAL module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_HAL_UART_H 00021 #define STM32L4xx_HAL_UART_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx_hal_def.h" 00029 00030 /** @addtogroup STM32L4xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup UART 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /** @defgroup UART_Exported_Types UART Exported Types 00040 * @{ 00041 */ 00042 00043 /** 00044 * @brief UART Init Structure definition 00045 */ 00046 typedef struct 00047 { 00048 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 00049 The baud rate register is computed using the following formula: 00050 LPUART: 00051 ======= 00052 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 00053 where lpuart_ker_ck_pres is the UART input clock 00054 (divided by a prescaler if applicable) 00055 UART: 00056 ===== 00057 - If oversampling is 16 or in LIN mode, 00058 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 00059 - If oversampling is 8, 00060 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 00061 ((huart->Init.BaudRate)))[15:4] 00062 Baud Rate Register[3] = 0 00063 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 00064 ((huart->Init.BaudRate)))[3:0]) >> 1 00065 where uart_ker_ck_pres is the UART input clock 00066 (divided by a prescaler if applicable) */ 00067 00068 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 00069 This parameter can be a value of @ref UARTEx_Word_Length. */ 00070 00071 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 00072 This parameter can be a value of @ref UART_Stop_Bits. */ 00073 00074 uint32_t Parity; /*!< Specifies the parity mode. 00075 This parameter can be a value of @ref UART_Parity 00076 @note When parity is enabled, the computed parity is inserted 00077 at the MSB position of the transmitted data (9th bit when 00078 the word length is set to 9 data bits; 8th bit when the 00079 word length is set to 8 data bits). */ 00080 00081 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 00082 This parameter can be a value of @ref UART_Mode. */ 00083 00084 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 00085 or disabled. 00086 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 00087 00088 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 00089 to achieve higher speed (up to f_PCLK/8). 00090 This parameter can be a value of @ref UART_Over_Sampling. */ 00091 00092 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 00093 Selecting the single sample method increases the receiver tolerance to clock 00094 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 00095 00096 #if defined(USART_PRESC_PRESCALER) 00097 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 00098 This parameter can be a value of @ref UART_ClockPrescaler. */ 00099 #endif /* USART_PRESC_PRESCALER */ 00100 00101 } UART_InitTypeDef; 00102 00103 /** 00104 * @brief UART Advanced Features initialization structure definition 00105 */ 00106 typedef struct 00107 { 00108 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 00109 Advanced Features may be initialized at the same time . 00110 This parameter can be a value of 00111 @ref UART_Advanced_Features_Initialization_Type. */ 00112 00113 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 00114 This parameter can be a value of @ref UART_Tx_Inv. */ 00115 00116 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 00117 This parameter can be a value of @ref UART_Rx_Inv. */ 00118 00119 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 00120 vs negative/inverted logic). 00121 This parameter can be a value of @ref UART_Data_Inv. */ 00122 00123 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 00124 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 00125 00126 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 00127 This parameter can be a value of @ref UART_Overrun_Disable. */ 00128 00129 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 00130 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 00131 00132 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 00133 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 00134 00135 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 00136 detection is carried out. 00137 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 00138 00139 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 00140 This parameter can be a value of @ref UART_MSB_First. */ 00141 } UART_AdvFeatureInitTypeDef; 00142 00143 /** 00144 * @brief HAL UART State definition 00145 * @note HAL UART State value is a combination of 2 different substates: 00146 * gState and RxState (see @ref UART_State_Definition). 00147 * - gState contains UART state information related to global Handle management 00148 * and also information related to Tx operations. 00149 * gState value coding follow below described bitmap : 00150 * b7-b6 Error information 00151 * 00 : No Error 00152 * 01 : (Not Used) 00153 * 10 : Timeout 00154 * 11 : Error 00155 * b5 Peripheral initialization status 00156 * 0 : Reset (Peripheral not initialized) 00157 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 00158 * b4-b3 (not used) 00159 * xx : Should be set to 00 00160 * b2 Intrinsic process state 00161 * 0 : Ready 00162 * 1 : Busy (Peripheral busy with some configuration or internal operations) 00163 * b1 (not used) 00164 * x : Should be set to 0 00165 * b0 Tx state 00166 * 0 : Ready (no Tx operation ongoing) 00167 * 1 : Busy (Tx operation ongoing) 00168 * - RxState contains information related to Rx operations. 00169 * RxState value coding follow below described bitmap : 00170 * b7-b6 (not used) 00171 * xx : Should be set to 00 00172 * b5 Peripheral initialization status 00173 * 0 : Reset (Peripheral not initialized) 00174 * 1 : Init done (Peripheral initialized) 00175 * b4-b2 (not used) 00176 * xxx : Should be set to 000 00177 * b1 Rx state 00178 * 0 : Ready (no Rx operation ongoing) 00179 * 1 : Busy (Rx operation ongoing) 00180 * b0 (not used) 00181 * x : Should be set to 0. 00182 */ 00183 typedef uint32_t HAL_UART_StateTypeDef; 00184 00185 /** 00186 * @brief UART clock sources definition 00187 */ 00188 typedef enum 00189 { 00190 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 00191 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 00192 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 00193 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 00194 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 00195 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 00196 } UART_ClockSourceTypeDef; 00197 00198 /** 00199 * @brief HAL UART Reception type definition 00200 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 00201 * It is expected to admit following values : 00202 * HAL_UART_RECEPTION_STANDARD = 0x00U, 00203 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 00204 * HAL_UART_RECEPTION_TORTO = 0x02U, 00205 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 00206 */ 00207 typedef uint32_t HAL_UART_RxTypeTypeDef; 00208 00209 /** 00210 * @brief UART handle Structure definition 00211 */ 00212 typedef struct __UART_HandleTypeDef 00213 { 00214 USART_TypeDef *Instance; /*!< UART registers base address */ 00215 00216 UART_InitTypeDef Init; /*!< UART communication parameters */ 00217 00218 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 00219 00220 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 00221 00222 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 00223 00224 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 00225 00226 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 00227 00228 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 00229 00230 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 00231 00232 uint16_t Mask; /*!< UART Rx RDR register mask */ 00233 00234 #if defined(USART_CR1_FIFOEN) 00235 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 00236 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 00237 00238 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 00239 00240 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 00241 00242 #endif /*USART_CR1_FIFOEN */ 00243 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 00244 00245 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 00246 00247 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 00248 00249 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 00250 00251 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 00252 00253 HAL_LockTypeDef Lock; /*!< Locking object */ 00254 00255 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 00256 and also related to Tx operations. This parameter 00257 can be a value of @ref HAL_UART_StateTypeDef */ 00258 00259 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 00260 parameter can be a value of @ref HAL_UART_StateTypeDef */ 00261 00262 __IO uint32_t ErrorCode; /*!< UART Error code */ 00263 00264 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00265 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 00266 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 00267 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 00268 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 00269 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 00270 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 00271 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 00272 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 00273 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 00274 #if defined(USART_CR1_FIFOEN) 00275 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 00276 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 00277 #endif /* USART_CR1_FIFOEN */ 00278 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 00279 00280 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 00281 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 00282 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00283 00284 } UART_HandleTypeDef; 00285 00286 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00287 /** 00288 * @brief HAL UART Callback ID enumeration definition 00289 */ 00290 typedef enum 00291 { 00292 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 00293 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 00294 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 00295 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 00296 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 00297 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 00298 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 00299 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 00300 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 00301 #if defined(USART_CR1_FIFOEN) 00302 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 00303 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 00304 #endif /* USART_CR1_FIFOEN */ 00305 00306 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 00307 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 00308 00309 } HAL_UART_CallbackIDTypeDef; 00310 00311 /** 00312 * @brief HAL UART Callback pointer definition 00313 */ 00314 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 00315 typedef void (*pUART_RxEventCallbackTypeDef) 00316 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 00317 00318 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00319 00320 /** 00321 * @} 00322 */ 00323 00324 /* Exported constants --------------------------------------------------------*/ 00325 /** @defgroup UART_Exported_Constants UART Exported Constants 00326 * @{ 00327 */ 00328 00329 /** @defgroup UART_State_Definition UART State Code Definition 00330 * @{ 00331 */ 00332 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 00333 Value is allowed for gState and RxState */ 00334 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 00335 Value is allowed for gState and RxState */ 00336 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 00337 Value is allowed for gState only */ 00338 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 00339 Value is allowed for gState only */ 00340 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 00341 Value is allowed for RxState only */ 00342 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 00343 Not to be used for neither gState nor RxState.Value is result 00344 of combination (Or) between gState and RxState values */ 00345 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 00346 Value is allowed for gState only */ 00347 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 00348 Value is allowed for gState only */ 00349 /** 00350 * @} 00351 */ 00352 00353 /** @defgroup UART_Error_Definition UART Error Definition 00354 * @{ 00355 */ 00356 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 00357 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 00358 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 00359 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 00360 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 00361 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 00362 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 00363 00364 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00365 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 00366 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 00367 /** 00368 * @} 00369 */ 00370 00371 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 00372 * @{ 00373 */ 00374 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 00375 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 00376 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 00377 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 00378 /** 00379 * @} 00380 */ 00381 00382 /** @defgroup UART_Parity UART Parity 00383 * @{ 00384 */ 00385 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 00386 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 00387 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 00388 /** 00389 * @} 00390 */ 00391 00392 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 00393 * @{ 00394 */ 00395 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 00396 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 00397 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 00398 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 00399 /** 00400 * @} 00401 */ 00402 00403 /** @defgroup UART_Mode UART Transfer Mode 00404 * @{ 00405 */ 00406 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 00407 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 00408 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 00409 /** 00410 * @} 00411 */ 00412 00413 /** @defgroup UART_State UART State 00414 * @{ 00415 */ 00416 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 00417 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 00418 /** 00419 * @} 00420 */ 00421 00422 /** @defgroup UART_Over_Sampling UART Over Sampling 00423 * @{ 00424 */ 00425 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 00426 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 00427 /** 00428 * @} 00429 */ 00430 00431 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 00432 * @{ 00433 */ 00434 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 00435 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 00436 /** 00437 * @} 00438 */ 00439 00440 #if defined(USART_PRESC_PRESCALER) 00441 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 00442 * @{ 00443 */ 00444 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 00445 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 00446 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 00447 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 00448 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 00449 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 00450 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 00451 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 00452 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 00453 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 00454 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 00455 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 00456 /** 00457 * @} 00458 */ 00459 00460 #endif /* USART_PRESC_PRESCALER */ 00461 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 00462 * @{ 00463 */ 00464 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 00465 on start bit */ 00466 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 00467 on falling edge */ 00468 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 00469 on 0x7F frame detection */ 00470 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 00471 on 0x55 frame detection */ 00472 /** 00473 * @} 00474 */ 00475 00476 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 00477 * @{ 00478 */ 00479 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 00480 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 00481 /** 00482 * @} 00483 */ 00484 00485 /** @defgroup UART_LIN UART Local Interconnection Network mode 00486 * @{ 00487 */ 00488 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 00489 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 00490 /** 00491 * @} 00492 */ 00493 00494 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 00495 * @{ 00496 */ 00497 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 00498 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 00499 /** 00500 * @} 00501 */ 00502 00503 /** @defgroup UART_DMA_Tx UART DMA Tx 00504 * @{ 00505 */ 00506 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 00507 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 00508 /** 00509 * @} 00510 */ 00511 00512 /** @defgroup UART_DMA_Rx UART DMA Rx 00513 * @{ 00514 */ 00515 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 00516 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 00517 /** 00518 * @} 00519 */ 00520 00521 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 00522 * @{ 00523 */ 00524 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 00525 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 00526 /** 00527 * @} 00528 */ 00529 00530 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 00531 * @{ 00532 */ 00533 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 00534 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 00535 /** 00536 * @} 00537 */ 00538 00539 /** @defgroup UART_Request_Parameters UART Request Parameters 00540 * @{ 00541 */ 00542 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 00543 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 00544 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 00545 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 00546 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 00547 /** 00548 * @} 00549 */ 00550 00551 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 00552 * @{ 00553 */ 00554 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 00555 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 00556 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 00557 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 00558 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 00559 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 00560 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 00561 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 00562 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 00563 /** 00564 * @} 00565 */ 00566 00567 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 00568 * @{ 00569 */ 00570 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 00571 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 00572 /** 00573 * @} 00574 */ 00575 00576 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 00577 * @{ 00578 */ 00579 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 00580 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 00581 /** 00582 * @} 00583 */ 00584 00585 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 00586 * @{ 00587 */ 00588 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 00589 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 00590 /** 00591 * @} 00592 */ 00593 00594 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 00595 * @{ 00596 */ 00597 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 00598 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 00599 /** 00600 * @} 00601 */ 00602 00603 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 00604 * @{ 00605 */ 00606 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 00607 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 00608 /** 00609 * @} 00610 */ 00611 00612 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 00613 * @{ 00614 */ 00615 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 00616 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 00617 /** 00618 * @} 00619 */ 00620 00621 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 00622 * @{ 00623 */ 00624 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 00625 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 00626 /** 00627 * @} 00628 */ 00629 00630 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 00631 * @{ 00632 */ 00633 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 00634 first disable */ 00635 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 00636 first enable */ 00637 /** 00638 * @} 00639 */ 00640 00641 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 00642 * @{ 00643 */ 00644 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 00645 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 00646 /** 00647 * @} 00648 */ 00649 00650 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 00651 * @{ 00652 */ 00653 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 00654 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 00655 /** 00656 * @} 00657 */ 00658 00659 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 00660 * @{ 00661 */ 00662 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 00663 /** 00664 * @} 00665 */ 00666 00667 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 00668 * @{ 00669 */ 00670 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 00671 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 00672 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 00673 not empty or RXFIFO is not empty */ 00674 /** 00675 * @} 00676 */ 00677 00678 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 00679 * @{ 00680 */ 00681 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 00682 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 00683 /** 00684 * @} 00685 */ 00686 00687 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 00688 * @{ 00689 */ 00690 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 00691 position in CR1 register */ 00692 /** 00693 * @} 00694 */ 00695 00696 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 00697 * @{ 00698 */ 00699 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 00700 position in CR1 register */ 00701 /** 00702 * @} 00703 */ 00704 00705 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 00706 * @{ 00707 */ 00708 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 00709 /** 00710 * @} 00711 */ 00712 00713 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 00714 * @{ 00715 */ 00716 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 00717 /** 00718 * @} 00719 */ 00720 00721 /** @defgroup UART_Flags UART Status Flags 00722 * Elements values convention: 0xXXXX 00723 * - 0xXXXX : Flag mask in the ISR register 00724 * @{ 00725 */ 00726 #if defined(USART_CR1_FIFOEN) 00727 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 00728 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 00729 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 00730 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 00731 #endif /* USART_CR1_FIFOEN */ 00732 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 00733 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 00734 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 00735 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 00736 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 00737 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 00738 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 00739 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 00740 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 00741 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 00742 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 00743 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 00744 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 00745 #if defined(USART_CR1_FIFOEN) 00746 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 00747 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 00748 #else 00749 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 00750 #endif /* USART_CR1_FIFOEN */ 00751 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 00752 #if defined(USART_CR1_FIFOEN) 00753 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 00754 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 00755 #else 00756 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 00757 #endif /* USART_CR1_FIFOEN */ 00758 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 00759 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 00760 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 00761 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 00762 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 00763 /** 00764 * @} 00765 */ 00766 00767 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 00768 * Elements values convention: 000ZZZZZ0XXYYYYYb 00769 * - YYYYY : Interrupt source position in the XX register (5bits) 00770 * - XX : Interrupt source register (2bits) 00771 * - 01: CR1 register 00772 * - 10: CR2 register 00773 * - 11: CR3 register 00774 * - ZZZZZ : Flag position in the ISR register(5bits) 00775 * Elements values convention: 000000000XXYYYYYb 00776 * - YYYYY : Interrupt source position in the XX register (5bits) 00777 * - XX : Interrupt source register (2bits) 00778 * - 01: CR1 register 00779 * - 10: CR2 register 00780 * - 11: CR3 register 00781 * Elements values convention: 0000ZZZZ00000000b 00782 * - ZZZZ : Flag position in the ISR register(4bits) 00783 * @{ 00784 */ 00785 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 00786 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 00787 #if defined(USART_CR1_FIFOEN) 00788 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 00789 #endif /* USART_CR1_FIFOEN */ 00790 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 00791 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 00792 #if defined(USART_CR1_FIFOEN) 00793 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 00794 #endif /* USART_CR1_FIFOEN */ 00795 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 00796 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 00797 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 00798 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 00799 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 00800 #if defined(USART_CR1_FIFOEN) 00801 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 00802 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 00803 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 00804 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 00805 #endif /* USART_CR1_FIFOEN */ 00806 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 00807 00808 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 00809 00810 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 00811 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 00812 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 00813 /** 00814 * @} 00815 */ 00816 00817 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 00818 * @{ 00819 */ 00820 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 00821 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 00822 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 00823 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 00824 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 00825 #if defined(USART_CR1_FIFOEN) 00826 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 00827 #endif /* USART_CR1_FIFOEN */ 00828 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 00829 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 00830 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 00831 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 00832 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 00833 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 00834 /** 00835 * @} 00836 */ 00837 00838 /** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values 00839 * @{ 00840 */ 00841 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 00842 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 00843 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 00844 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 00845 /** 00846 * @} 00847 */ 00848 00849 /** 00850 * @} 00851 */ 00852 00853 /* Exported macros -----------------------------------------------------------*/ 00854 /** @defgroup UART_Exported_Macros UART Exported Macros 00855 * @{ 00856 */ 00857 00858 /** @brief Reset UART handle states. 00859 * @param __HANDLE__ UART handle. 00860 * @retval None 00861 */ 00862 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 00863 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00864 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 00865 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 00866 (__HANDLE__)->MspInitCallback = NULL; \ 00867 (__HANDLE__)->MspDeInitCallback = NULL; \ 00868 } while(0U) 00869 #else 00870 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 00871 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 00872 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 00873 } while(0U) 00874 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 00875 00876 /** @brief Flush the UART Data registers. 00877 * @param __HANDLE__ specifies the UART Handle. 00878 * @retval None 00879 */ 00880 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 00881 do{ \ 00882 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 00883 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 00884 } while(0U) 00885 00886 /** @brief Clear the specified UART pending flag. 00887 * @param __HANDLE__ specifies the UART Handle. 00888 * @param __FLAG__ specifies the flag to check. 00889 * This parameter can be any combination of the following values: 00890 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 00891 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 00892 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 00893 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 00894 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 00895 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 00896 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 00897 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 00898 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 00899 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 00900 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 00901 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 00902 * @retval None 00903 */ 00904 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 00905 00906 /** @brief Clear the UART PE pending flag. 00907 * @param __HANDLE__ specifies the UART Handle. 00908 * @retval None 00909 */ 00910 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 00911 00912 /** @brief Clear the UART FE pending flag. 00913 * @param __HANDLE__ specifies the UART Handle. 00914 * @retval None 00915 */ 00916 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 00917 00918 /** @brief Clear the UART NE pending flag. 00919 * @param __HANDLE__ specifies the UART Handle. 00920 * @retval None 00921 */ 00922 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 00923 00924 /** @brief Clear the UART ORE pending flag. 00925 * @param __HANDLE__ specifies the UART Handle. 00926 * @retval None 00927 */ 00928 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 00929 00930 /** @brief Clear the UART IDLE pending flag. 00931 * @param __HANDLE__ specifies the UART Handle. 00932 * @retval None 00933 */ 00934 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 00935 00936 #if defined(USART_CR1_FIFOEN) 00937 /** @brief Clear the UART TX FIFO empty clear flag. 00938 * @param __HANDLE__ specifies the UART Handle. 00939 * @retval None 00940 */ 00941 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 00942 #endif /* USART_CR1_FIFOEN */ 00943 00944 /** @brief Check whether the specified UART flag is set or not. 00945 * @param __HANDLE__ specifies the UART Handle. 00946 * @param __FLAG__ specifies the flag to check. 00947 * This parameter can be one of the following values: 00948 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 00949 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 00950 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 00951 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 00952 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 00953 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 00954 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 00955 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 00956 * @arg @ref UART_FLAG_SBKF Send Break flag 00957 * @arg @ref UART_FLAG_CMF Character match flag 00958 * @arg @ref UART_FLAG_BUSY Busy flag 00959 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 00960 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 00961 * @arg @ref UART_FLAG_CTS CTS Change flag 00962 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 00963 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 00964 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 00965 * @arg @ref UART_FLAG_TC Transmission Complete flag 00966 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 00967 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 00968 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 00969 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 00970 * @arg @ref UART_FLAG_ORE Overrun Error flag 00971 * @arg @ref UART_FLAG_NE Noise Error flag 00972 * @arg @ref UART_FLAG_FE Framing Error flag 00973 * @arg @ref UART_FLAG_PE Parity Error flag 00974 * @retval The new state of __FLAG__ (TRUE or FALSE). 00975 */ 00976 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 00977 00978 /** @brief Enable the specified UART interrupt. 00979 * @param __HANDLE__ specifies the UART Handle. 00980 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 00981 * This parameter can be one of the following values: 00982 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 00983 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 00984 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 00985 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 00986 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 00987 * @arg @ref UART_IT_CM Character match interrupt 00988 * @arg @ref UART_IT_CTS CTS change interrupt 00989 * @arg @ref UART_IT_LBD LIN Break detection interrupt 00990 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 00991 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 00992 * @arg @ref UART_IT_TC Transmission complete interrupt 00993 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 00994 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 00995 * @arg @ref UART_IT_RTO Receive Timeout interrupt 00996 * @arg @ref UART_IT_IDLE Idle line detection interrupt 00997 * @arg @ref UART_IT_PE Parity Error interrupt 00998 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 00999 * @retval None 01000 */ 01001 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 01002 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 01003 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 01004 ((__INTERRUPT__) & UART_IT_MASK))): \ 01005 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 01006 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 01007 ((__INTERRUPT__) & UART_IT_MASK))): \ 01008 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 01009 ((__INTERRUPT__) & UART_IT_MASK)))) 01010 01011 /** @brief Disable the specified UART interrupt. 01012 * @param __HANDLE__ specifies the UART Handle. 01013 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 01014 * This parameter can be one of the following values: 01015 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 01016 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 01017 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 01018 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 01019 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 01020 * @arg @ref UART_IT_CM Character match interrupt 01021 * @arg @ref UART_IT_CTS CTS change interrupt 01022 * @arg @ref UART_IT_LBD LIN Break detection interrupt 01023 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 01024 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 01025 * @arg @ref UART_IT_TC Transmission complete interrupt 01026 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 01027 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 01028 * @arg @ref UART_IT_RTO Receive Timeout interrupt 01029 * @arg @ref UART_IT_IDLE Idle line detection interrupt 01030 * @arg @ref UART_IT_PE Parity Error interrupt 01031 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 01032 * @retval None 01033 */ 01034 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 01035 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 01036 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 01037 ((__INTERRUPT__) & UART_IT_MASK))): \ 01038 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 01039 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 01040 ((__INTERRUPT__) & UART_IT_MASK))): \ 01041 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 01042 ((__INTERRUPT__) & UART_IT_MASK)))) 01043 01044 /** @brief Check whether the specified UART interrupt has occurred or not. 01045 * @param __HANDLE__ specifies the UART Handle. 01046 * @param __INTERRUPT__ specifies the UART interrupt to check. 01047 * This parameter can be one of the following values: 01048 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 01049 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 01050 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 01051 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 01052 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 01053 * @arg @ref UART_IT_CM Character match interrupt 01054 * @arg @ref UART_IT_CTS CTS change interrupt 01055 * @arg @ref UART_IT_LBD LIN Break detection interrupt 01056 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 01057 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 01058 * @arg @ref UART_IT_TC Transmission complete interrupt 01059 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 01060 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 01061 * @arg @ref UART_IT_RTO Receive Timeout interrupt 01062 * @arg @ref UART_IT_IDLE Idle line detection interrupt 01063 * @arg @ref UART_IT_PE Parity Error interrupt 01064 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 01065 * @retval The new state of __INTERRUPT__ (SET or RESET). 01066 */ 01067 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 01068 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 01069 01070 /** @brief Check whether the specified UART interrupt source is enabled or not. 01071 * @param __HANDLE__ specifies the UART Handle. 01072 * @param __INTERRUPT__ specifies the UART interrupt source to check. 01073 * This parameter can be one of the following values: 01074 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 01075 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 01076 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 01077 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 01078 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 01079 * @arg @ref UART_IT_CM Character match interrupt 01080 * @arg @ref UART_IT_CTS CTS change interrupt 01081 * @arg @ref UART_IT_LBD LIN Break detection interrupt 01082 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 01083 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 01084 * @arg @ref UART_IT_TC Transmission complete interrupt 01085 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 01086 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 01087 * @arg @ref UART_IT_RTO Receive Timeout interrupt 01088 * @arg @ref UART_IT_IDLE Idle line detection interrupt 01089 * @arg @ref UART_IT_PE Parity Error interrupt 01090 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 01091 * @retval The new state of __INTERRUPT__ (SET or RESET). 01092 */ 01093 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 01094 (__HANDLE__)->Instance->CR1 : \ 01095 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 01096 (__HANDLE__)->Instance->CR2 : \ 01097 (__HANDLE__)->Instance->CR3)) & (1U <<\ 01098 (((uint16_t)(__INTERRUPT__)) &\ 01099 UART_IT_MASK))) != RESET) ? SET : RESET) 01100 01101 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 01102 * @param __HANDLE__ specifies the UART Handle. 01103 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 01104 * to clear the corresponding interrupt 01105 * This parameter can be one of the following values: 01106 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 01107 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 01108 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 01109 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 01110 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 01111 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 01112 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 01113 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 01114 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 01115 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 01116 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 01117 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 01118 * @retval None 01119 */ 01120 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 01121 01122 /** @brief Set a specific UART request flag. 01123 * @param __HANDLE__ specifies the UART Handle. 01124 * @param __REQ__ specifies the request flag to set 01125 * This parameter can be one of the following values: 01126 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 01127 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 01128 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 01129 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 01130 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 01131 * @retval None 01132 */ 01133 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 01134 01135 /** @brief Enable the UART one bit sample method. 01136 * @param __HANDLE__ specifies the UART Handle. 01137 * @retval None 01138 */ 01139 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 01140 01141 /** @brief Disable the UART one bit sample method. 01142 * @param __HANDLE__ specifies the UART Handle. 01143 * @retval None 01144 */ 01145 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 01146 01147 /** @brief Enable UART. 01148 * @param __HANDLE__ specifies the UART Handle. 01149 * @retval None 01150 */ 01151 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 01152 01153 /** @brief Disable UART. 01154 * @param __HANDLE__ specifies the UART Handle. 01155 * @retval None 01156 */ 01157 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 01158 01159 /** @brief Enable CTS flow control. 01160 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 01161 * without need to call HAL_UART_Init() function. 01162 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01163 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 01164 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01165 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01166 * - macro could only be called when corresponding UART instance is disabled 01167 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 01168 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01169 * @param __HANDLE__ specifies the UART Handle. 01170 * @retval None 01171 */ 01172 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 01173 do{ \ 01174 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 01175 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 01176 } while(0U) 01177 01178 /** @brief Disable CTS flow control. 01179 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 01180 * without need to call HAL_UART_Init() function. 01181 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01182 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 01183 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01184 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01185 * - macro could only be called when corresponding UART instance is disabled 01186 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 01187 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01188 * @param __HANDLE__ specifies the UART Handle. 01189 * @retval None 01190 */ 01191 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 01192 do{ \ 01193 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 01194 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 01195 } while(0U) 01196 01197 /** @brief Enable RTS flow control. 01198 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 01199 * without need to call HAL_UART_Init() function. 01200 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01201 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 01202 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01203 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01204 * - macro could only be called when corresponding UART instance is disabled 01205 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 01206 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01207 * @param __HANDLE__ specifies the UART Handle. 01208 * @retval None 01209 */ 01210 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 01211 do{ \ 01212 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 01213 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 01214 } while(0U) 01215 01216 /** @brief Disable RTS flow control. 01217 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 01218 * without need to call HAL_UART_Init() function. 01219 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 01220 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 01221 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 01222 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 01223 * - macro could only be called when corresponding UART instance is disabled 01224 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 01225 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 01226 * @param __HANDLE__ specifies the UART Handle. 01227 * @retval None 01228 */ 01229 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 01230 do{ \ 01231 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 01232 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 01233 } while(0U) 01234 /** 01235 * @} 01236 */ 01237 01238 /* Private macros --------------------------------------------------------*/ 01239 /** @defgroup UART_Private_Macros UART Private Macros 01240 * @{ 01241 */ 01242 #if defined(USART_PRESC_PRESCALER) 01243 /** @brief Get UART clok division factor from clock prescaler value. 01244 * @param __CLOCKPRESCALER__ UART prescaler value. 01245 * @retval UART clock division factor 01246 */ 01247 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 01248 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 01249 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 01250 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 01251 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 01252 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 01253 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 01254 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 01255 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 01256 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 01257 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 01258 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 01259 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 01260 01261 /** @brief BRR division operation to set BRR register with LPUART. 01262 * @param __PCLK__ LPUART clock. 01263 * @param __BAUD__ Baud rate set by the user. 01264 * @param __CLOCKPRESCALER__ UART prescaler value. 01265 * @retval Division result 01266 */ 01267 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 01268 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 01269 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 01270 ) 01271 01272 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 01273 * @param __PCLK__ UART clock. 01274 * @param __BAUD__ Baud rate set by the user. 01275 * @param __CLOCKPRESCALER__ UART prescaler value. 01276 * @retval Division result 01277 */ 01278 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 01279 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 01280 01281 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 01282 * @param __PCLK__ UART clock. 01283 * @param __BAUD__ Baud rate set by the user. 01284 * @param __CLOCKPRESCALER__ UART prescaler value. 01285 * @retval Division result 01286 */ 01287 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 01288 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 01289 #else 01290 01291 /** @brief BRR division operation to set BRR register with LPUART. 01292 * @param __PCLK__ LPUART clock. 01293 * @param __BAUD__ Baud rate set by the user. 01294 * @retval Division result 01295 */ 01296 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 01297 01298 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 01299 * @param __PCLK__ UART clock. 01300 * @param __BAUD__ Baud rate set by the user. 01301 * @retval Division result 01302 */ 01303 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 01304 01305 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 01306 * @param __PCLK__ UART clock. 01307 * @param __BAUD__ Baud rate set by the user. 01308 * @retval Division result 01309 */ 01310 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 01311 #endif /* USART_PRESC_PRESCALER */ 01312 01313 /** @brief Check whether or not UART instance is Low Power UART. 01314 * @param __HANDLE__ specifies the UART Handle. 01315 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 01316 */ 01317 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 01318 01319 /** @brief Check UART Baud rate. 01320 * @param __BAUDRATE__ Baudrate specified by the user. 01321 * The maximum Baud Rate is derived from the maximum clock on L4 01322 * divided by the smallest oversampling used on the USART (i.e. 8) 01323 * (i.e. 120 MHz on STM32L4Rx/L4Sx, 80 Mhz otherwise) 01324 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 01325 */ 01326 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 01327 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U) 01328 #else 01329 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U) 01330 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 01331 01332 /** @brief Check UART assertion time. 01333 * @param __TIME__ 5-bit value assertion time. 01334 * @retval Test result (TRUE or FALSE). 01335 */ 01336 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 01337 01338 /** @brief Check UART deassertion time. 01339 * @param __TIME__ 5-bit value deassertion time. 01340 * @retval Test result (TRUE or FALSE). 01341 */ 01342 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 01343 01344 /** 01345 * @brief Ensure that UART frame number of stop bits is valid. 01346 * @param __STOPBITS__ UART frame number of stop bits. 01347 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 01348 */ 01349 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 01350 ((__STOPBITS__) == UART_STOPBITS_1) || \ 01351 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 01352 ((__STOPBITS__) == UART_STOPBITS_2)) 01353 01354 /** 01355 * @brief Ensure that LPUART frame number of stop bits is valid. 01356 * @param __STOPBITS__ LPUART frame number of stop bits. 01357 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 01358 */ 01359 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 01360 ((__STOPBITS__) == UART_STOPBITS_2)) 01361 01362 /** 01363 * @brief Ensure that UART frame parity is valid. 01364 * @param __PARITY__ UART frame parity. 01365 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 01366 */ 01367 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 01368 ((__PARITY__) == UART_PARITY_EVEN) || \ 01369 ((__PARITY__) == UART_PARITY_ODD)) 01370 01371 /** 01372 * @brief Ensure that UART hardware flow control is valid. 01373 * @param __CONTROL__ UART hardware flow control. 01374 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 01375 */ 01376 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 01377 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 01378 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 01379 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 01380 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 01381 01382 /** 01383 * @brief Ensure that UART communication mode is valid. 01384 * @param __MODE__ UART communication mode. 01385 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 01386 */ 01387 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 01388 01389 /** 01390 * @brief Ensure that UART state is valid. 01391 * @param __STATE__ UART state. 01392 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 01393 */ 01394 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 01395 ((__STATE__) == UART_STATE_ENABLE)) 01396 01397 /** 01398 * @brief Ensure that UART oversampling is valid. 01399 * @param __SAMPLING__ UART oversampling. 01400 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 01401 */ 01402 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 01403 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 01404 01405 /** 01406 * @brief Ensure that UART frame sampling is valid. 01407 * @param __ONEBIT__ UART frame sampling. 01408 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 01409 */ 01410 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 01411 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 01412 01413 /** 01414 * @brief Ensure that UART auto Baud rate detection mode is valid. 01415 * @param __MODE__ UART auto Baud rate detection mode. 01416 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 01417 */ 01418 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 01419 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 01420 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 01421 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 01422 01423 /** 01424 * @brief Ensure that UART receiver timeout setting is valid. 01425 * @param __TIMEOUT__ UART receiver timeout setting. 01426 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 01427 */ 01428 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 01429 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 01430 01431 /** @brief Check the receiver timeout value. 01432 * @note The maximum UART receiver timeout value is 0xFFFFFF. 01433 * @param __TIMEOUTVALUE__ receiver timeout value. 01434 * @retval Test result (TRUE or FALSE) 01435 */ 01436 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 01437 01438 /** 01439 * @brief Ensure that UART LIN state is valid. 01440 * @param __LIN__ UART LIN state. 01441 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 01442 */ 01443 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 01444 ((__LIN__) == UART_LIN_ENABLE)) 01445 01446 /** 01447 * @brief Ensure that UART LIN break detection length is valid. 01448 * @param __LENGTH__ UART LIN break detection length. 01449 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 01450 */ 01451 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 01452 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 01453 01454 /** 01455 * @brief Ensure that UART DMA TX state is valid. 01456 * @param __DMATX__ UART DMA TX state. 01457 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 01458 */ 01459 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 01460 ((__DMATX__) == UART_DMA_TX_ENABLE)) 01461 01462 /** 01463 * @brief Ensure that UART DMA RX state is valid. 01464 * @param __DMARX__ UART DMA RX state. 01465 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 01466 */ 01467 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 01468 ((__DMARX__) == UART_DMA_RX_ENABLE)) 01469 01470 /** 01471 * @brief Ensure that UART half-duplex state is valid. 01472 * @param __HDSEL__ UART half-duplex state. 01473 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 01474 */ 01475 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 01476 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 01477 01478 /** 01479 * @brief Ensure that UART wake-up method is valid. 01480 * @param __WAKEUP__ UART wake-up method . 01481 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 01482 */ 01483 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 01484 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 01485 01486 /** 01487 * @brief Ensure that UART request parameter is valid. 01488 * @param __PARAM__ UART request parameter. 01489 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 01490 */ 01491 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 01492 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 01493 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 01494 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 01495 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 01496 01497 /** 01498 * @brief Ensure that UART advanced features initialization is valid. 01499 * @param __INIT__ UART advanced features initialization. 01500 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 01501 */ 01502 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 01503 UART_ADVFEATURE_TXINVERT_INIT | \ 01504 UART_ADVFEATURE_RXINVERT_INIT | \ 01505 UART_ADVFEATURE_DATAINVERT_INIT | \ 01506 UART_ADVFEATURE_SWAP_INIT | \ 01507 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 01508 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 01509 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 01510 UART_ADVFEATURE_MSBFIRST_INIT)) 01511 01512 /** 01513 * @brief Ensure that UART frame TX inversion setting is valid. 01514 * @param __TXINV__ UART frame TX inversion setting. 01515 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 01516 */ 01517 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 01518 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 01519 01520 /** 01521 * @brief Ensure that UART frame RX inversion setting is valid. 01522 * @param __RXINV__ UART frame RX inversion setting. 01523 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 01524 */ 01525 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 01526 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 01527 01528 /** 01529 * @brief Ensure that UART frame data inversion setting is valid. 01530 * @param __DATAINV__ UART frame data inversion setting. 01531 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 01532 */ 01533 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 01534 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 01535 01536 /** 01537 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 01538 * @param __SWAP__ UART frame RX/TX pins swap setting. 01539 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 01540 */ 01541 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 01542 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 01543 01544 /** 01545 * @brief Ensure that UART frame overrun setting is valid. 01546 * @param __OVERRUN__ UART frame overrun setting. 01547 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 01548 */ 01549 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 01550 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 01551 01552 /** 01553 * @brief Ensure that UART auto Baud rate state is valid. 01554 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 01555 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 01556 */ 01557 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 01558 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 01559 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 01560 01561 /** 01562 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 01563 * @param __DMA__ UART DMA enabling or disabling on error setting. 01564 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 01565 */ 01566 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 01567 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 01568 01569 /** 01570 * @brief Ensure that UART frame MSB first setting is valid. 01571 * @param __MSBFIRST__ UART frame MSB first setting. 01572 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 01573 */ 01574 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 01575 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 01576 01577 /** 01578 * @brief Ensure that UART stop mode state is valid. 01579 * @param __STOPMODE__ UART stop mode state. 01580 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 01581 */ 01582 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 01583 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 01584 01585 /** 01586 * @brief Ensure that UART mute mode state is valid. 01587 * @param __MUTE__ UART mute mode state. 01588 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 01589 */ 01590 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 01591 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 01592 01593 /** 01594 * @brief Ensure that UART wake-up selection is valid. 01595 * @param __WAKE__ UART wake-up selection. 01596 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 01597 */ 01598 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 01599 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 01600 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 01601 01602 /** 01603 * @brief Ensure that UART driver enable polarity is valid. 01604 * @param __POLARITY__ UART driver enable polarity. 01605 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 01606 */ 01607 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 01608 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 01609 01610 #if defined(USART_PRESC_PRESCALER) 01611 /** 01612 * @brief Ensure that UART Prescaler is valid. 01613 * @param __CLOCKPRESCALER__ UART Prescaler value. 01614 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 01615 */ 01616 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 01617 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 01618 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 01619 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 01620 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 01621 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 01622 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 01623 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 01624 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 01625 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 01626 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 01627 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 01628 #endif /* USART_PRESC_PRESCALER */ 01629 01630 /** 01631 * @} 01632 */ 01633 01634 /* Include UART HAL Extended module */ 01635 #include "stm32l4xx_hal_uart_ex.h" 01636 01637 /* Exported functions --------------------------------------------------------*/ 01638 /** @addtogroup UART_Exported_Functions UART Exported Functions 01639 * @{ 01640 */ 01641 01642 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 01643 * @{ 01644 */ 01645 01646 /* Initialization and de-initialization functions ****************************/ 01647 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 01648 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 01649 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 01650 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 01651 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 01652 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 01653 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 01654 01655 /* Callbacks Register/UnRegister functions ***********************************/ 01656 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 01657 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 01658 pUART_CallbackTypeDef pCallback); 01659 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 01660 01661 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 01662 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 01663 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 01664 01665 /** 01666 * @} 01667 */ 01668 01669 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 01670 * @{ 01671 */ 01672 01673 /* IO operation functions *****************************************************/ 01674 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 01675 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 01676 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 01677 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01678 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 01679 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01680 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 01681 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 01682 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 01683 /* Transfer Abort functions */ 01684 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 01685 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 01686 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 01687 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 01688 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 01689 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 01690 01691 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 01692 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 01693 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 01694 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 01695 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 01696 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 01697 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 01698 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 01699 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 01700 01701 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 01702 01703 /** 01704 * @} 01705 */ 01706 01707 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 01708 * @{ 01709 */ 01710 01711 /* Peripheral Control functions ************************************************/ 01712 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 01713 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 01714 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 01715 01716 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 01717 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 01718 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 01719 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 01720 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 01721 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 01722 01723 /** 01724 * @} 01725 */ 01726 01727 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 01728 * @{ 01729 */ 01730 01731 /* Peripheral State and Errors functions **************************************************/ 01732 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 01733 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 01734 01735 /** 01736 * @} 01737 */ 01738 01739 /** 01740 * @} 01741 */ 01742 01743 /* Private functions -----------------------------------------------------------*/ 01744 /** @addtogroup UART_Private_Functions UART Private Functions 01745 * @{ 01746 */ 01747 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 01748 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 01749 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 01750 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 01751 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 01752 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 01753 uint32_t Tickstart, uint32_t Timeout); 01754 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 01755 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01756 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 01757 01758 /** 01759 * @} 01760 */ 01761 01762 /* Private variables -----------------------------------------------------------*/ 01763 #if defined(USART_PRESC_PRESCALER) 01764 /** @defgroup UART_Private_variables UART Private variables 01765 * @{ 01766 */ 01767 /* Prescaler Table used in BRR computation macros. 01768 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 01769 extern const uint16_t UARTPrescTable[12]; 01770 /** 01771 * @} 01772 */ 01773 01774 #endif /* USART_PRESC_PRESCALER */ 01775 /** 01776 * @} 01777 */ 01778 01779 /** 01780 * @} 01781 */ 01782 01783 #ifdef __cplusplus 01784 } 01785 #endif 01786 01787 #endif /* STM32L4xx_HAL_UART_H */ 01788
1.7.6.1