STM32F103xB HAL User Manual
Defines
APB1 Clock Enable Disable
RCCEx Exported Macros

Enable or disable the Low Speed APB (APB1) peripheral clock. More...

Defines

#define __HAL_RCC_CAN1_CLK_ENABLE()
#define __HAL_RCC_CAN1_CLK_DISABLE()   (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))
#define __HAL_RCC_TIM4_CLK_ENABLE()
#define __HAL_RCC_SPI2_CLK_ENABLE()
#define __HAL_RCC_USART3_CLK_ENABLE()
#define __HAL_RCC_I2C2_CLK_ENABLE()
#define __HAL_RCC_TIM4_CLK_DISABLE()   (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
#define __HAL_RCC_SPI2_CLK_DISABLE()   (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN))
#define __HAL_RCC_USART3_CLK_DISABLE()   (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))
#define __HAL_RCC_I2C2_CLK_DISABLE()   (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C2EN))
#define __HAL_RCC_USB_CLK_ENABLE()
#define __HAL_RCC_USB_CLK_DISABLE()   (RCC->APB1ENR &= ~(RCC_APB1ENR_USBEN))

Detailed Description

Enable or disable the Low Speed APB (APB1) peripheral clock.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_CAN1_CLK_DISABLE ( )    (RCC->APB1ENR &= ~(RCC_APB1ENR_CAN1EN))

Definition at line 789 of file stm32f1xx_hal_rcc_ex.h.

Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_CAN1EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 781 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_I2C2_CLK_DISABLE ( )    (RCC->APB1ENR &= ~(RCC_APB1ENR_I2C2EN))

Definition at line 831 of file stm32f1xx_hal_rcc_ex.h.

Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_I2C2EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 820 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_SPI2_CLK_DISABLE ( )    (RCC->APB1ENR &= ~(RCC_APB1ENR_SPI2EN))

Definition at line 829 of file stm32f1xx_hal_rcc_ex.h.

Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_SPI2EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 804 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_TIM4_CLK_DISABLE ( )    (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))

Definition at line 828 of file stm32f1xx_hal_rcc_ex.h.

Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_TIM4EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 796 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_USART3_CLK_DISABLE ( )    (RCC->APB1ENR &= ~(RCC_APB1ENR_USART3EN))

Definition at line 830 of file stm32f1xx_hal_rcc_ex.h.

Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USART3EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 812 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_USB_CLK_DISABLE ( )    (RCC->APB1ENR &= ~(RCC_APB1ENR_USBEN))

Definition at line 844 of file stm32f1xx_hal_rcc_ex.h.

Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB1ENR, RCC_APB1ENR_USBEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB1ENR, RCC_APB1ENR_USBEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 836 of file stm32f1xx_hal_rcc_ex.h.