APB2 Clock Enable Disable

Enable or disable the High Speed APB (APB2) peripheral clock. More...

Defines
#define	__HAL_RCC_ADC2_CLK_ENABLE()
#define	__HAL_RCC_ADC2_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC2EN))
#define	__HAL_RCC_GPIOE_CLK_ENABLE()
#define	__HAL_RCC_GPIOE_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPEEN))

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Detailed Description

Enable or disable the High Speed APB (APB2) peripheral clock.

Note:

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

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Define Documentation

#define __HAL_RCC_ADC2_CLK_DISABLE

(

)

(RCC->APB2ENR &= ~(RCC_APB2ENR_ADC2EN))

Definition at line 1175 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_ADC2_CLK_ENABLE

(

)

Value:

do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC2EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1167 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOE_CLK_DISABLE

(

)

(RCC->APB2ENR &= ~(RCC_APB2ENR_IOPEEN))

Definition at line 1220 of file stm32f1xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOE_CLK_ENABLE

(

)

Value:

do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPEEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPEEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1212 of file stm32f1xx_hal_rcc_ex.h.