AHB Clock Source

Defines
#define	RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1
#define	RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2
#define	RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4
#define	RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8
#define	RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16
#define	RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64
#define	RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128
#define	RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256
#define	RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512

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Define Documentation

#define RCC_SYSCLK_DIV1   RCC_CFGR_HPRE_DIV1

SYSCLK not divided

Definition at line 205 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV128   RCC_CFGR_HPRE_DIV128

SYSCLK divided by 128

Definition at line 211 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV16   RCC_CFGR_HPRE_DIV16

SYSCLK divided by 16

Definition at line 209 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV2   RCC_CFGR_HPRE_DIV2

SYSCLK divided by 2

Definition at line 206 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV256   RCC_CFGR_HPRE_DIV256

SYSCLK divided by 256

Definition at line 212 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV4   RCC_CFGR_HPRE_DIV4

SYSCLK divided by 4

Definition at line 207 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV512   RCC_CFGR_HPRE_DIV512

SYSCLK divided by 512

Definition at line 213 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV64   RCC_CFGR_HPRE_DIV64

SYSCLK divided by 64

Definition at line 210 of file stm32f1xx_hal_rcc.h.

#define RCC_SYSCLK_DIV8   RCC_CFGR_HPRE_DIV8

SYSCLK divided by 8

Definition at line 208 of file stm32f1xx_hal_rcc.h.