STM32F103xB HAL User Manual
Defines
APB2 Clock Enable Disable
RCC Exported Macros

Enable or disable the High Speed APB (APB2) peripheral clock. More...

Defines

#define __HAL_RCC_AFIO_CLK_ENABLE()
#define __HAL_RCC_GPIOA_CLK_ENABLE()
#define __HAL_RCC_GPIOB_CLK_ENABLE()
#define __HAL_RCC_GPIOC_CLK_ENABLE()
#define __HAL_RCC_GPIOD_CLK_ENABLE()
#define __HAL_RCC_ADC1_CLK_ENABLE()
#define __HAL_RCC_TIM1_CLK_ENABLE()
#define __HAL_RCC_SPI1_CLK_ENABLE()
#define __HAL_RCC_USART1_CLK_ENABLE()
#define __HAL_RCC_AFIO_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_AFIOEN))
#define __HAL_RCC_GPIOA_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPAEN))
#define __HAL_RCC_GPIOB_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPBEN))
#define __HAL_RCC_GPIOC_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPCEN))
#define __HAL_RCC_GPIOD_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPDEN))
#define __HAL_RCC_ADC1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN))
#define __HAL_RCC_TIM1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM1EN))
#define __HAL_RCC_SPI1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))
#define __HAL_RCC_USART1_CLK_DISABLE()   (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))

Detailed Description

Enable or disable the High Speed APB (APB2) peripheral clock.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_ADC1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN))

Definition at line 572 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_ADC1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 535 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_AFIO_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_AFIOEN))

Definition at line 567 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_AFIO_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_AFIOEN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_AFIOEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 495 of file stm32f1xx_hal_rcc.h.

Referenced by HAL_GPIO_Init().

#define __HAL_RCC_GPIOA_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPAEN))

Definition at line 568 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_GPIOA_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 503 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_GPIOB_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPBEN))

Definition at line 569 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_GPIOB_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPBEN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPBEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 511 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_GPIOC_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPCEN))

Definition at line 570 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_GPIOC_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPCEN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPCEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 519 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_GPIOD_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPDEN))

Definition at line 571 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_GPIOD_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 527 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_SPI1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN))

Definition at line 575 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_SPI1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 551 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_TIM1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM1EN))

Definition at line 574 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_TIM1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 543 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_USART1_CLK_DISABLE ( )    (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN))

Definition at line 576 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_USART1_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg; \
                                        SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
                                        /* Delay after an RCC peripheral clock enabling */\
                                        tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
                                        UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 559 of file stm32f1xx_hal_rcc.h.

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