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STM32F103xB HAL User Manual
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Defines | |
| #define | RCC_PLLSOURCE_HSI_DIV2 0x00000000U |
| #define | RCC_PLLSOURCE_HSE RCC_CFGR_PLLSRC |
| #define RCC_PLLSOURCE_HSE RCC_CFGR_PLLSRC |
HSE clock selected as PLL entry clock source
Definition at line 96 of file stm32f1xx_hal_rcc.h.
Referenced by HAL_RCC_OscConfig().
| #define RCC_PLLSOURCE_HSI_DIV2 0x00000000U |
HSI clock divided by 2 selected as PLL entry clock source
Definition at line 95 of file stm32f1xx_hal_rcc.h.
Referenced by HAL_RCC_GetSysClockFreq(), HAL_RCC_OscConfig(), and HAL_RCCEx_GetPeriphCLKFreq().
1.7.6.1