STM32F103xB HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32f1xx_hal_tim_ex.c 00004 * @author MCD Application Team 00005 * @brief TIM HAL module driver. 00006 * This file provides firmware functions to manage the following 00007 * functionalities of the Timer Extended peripheral: 00008 * + Time Hall Sensor Interface Initialization 00009 * + Time Hall Sensor Interface Start 00010 * + Time Complementary signal break and dead time configuration 00011 * + Time Master and Slave synchronization configuration 00012 * + Timer remapping capabilities configuration 00013 @verbatim 00014 ============================================================================== 00015 ##### TIMER Extended features ##### 00016 ============================================================================== 00017 [..] 00018 The Timer Extended features include: 00019 (#) Complementary outputs with programmable dead-time for : 00020 (++) Output Compare 00021 (++) PWM generation (Edge and Center-aligned Mode) 00022 (++) One-pulse mode output 00023 (#) Synchronization circuit to control the timer with external signals and to 00024 interconnect several timers together. 00025 (#) Break input to put the timer output signals in reset state or in a known state. 00026 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for 00027 positioning purposes 00028 00029 ##### How to use this driver ##### 00030 ============================================================================== 00031 [..] 00032 (#) Initialize the TIM low level resources by implementing the following functions 00033 depending on the selected feature: 00034 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() 00035 00036 (#) Initialize the TIM low level resources : 00037 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); 00038 (##) TIM pins configuration 00039 (+++) Enable the clock for the TIM GPIOs using the following function: 00040 __HAL_RCC_GPIOx_CLK_ENABLE(); 00041 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); 00042 00043 (#) The external Clock can be configured, if needed (the default clock is the 00044 internal clock from the APBx), using the following function: 00045 HAL_TIM_ConfigClockSource, the clock configuration should be done before 00046 any start function. 00047 00048 (#) Configure the TIM in the desired functioning mode using one of the 00049 initialization function of this driver: 00050 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the 00051 Timer Hall Sensor Interface and the commutation event with the corresponding 00052 Interrupt and DMA request if needed (Note that One Timer is used to interface 00053 with the Hall sensor Interface and another Timer should be used to use 00054 the commutation event). 00055 00056 (#) Activate the TIM peripheral using one of the start functions: 00057 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), 00058 HAL_TIMEx_OCN_Start_IT() 00059 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), 00060 HAL_TIMEx_PWMN_Start_IT() 00061 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() 00062 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), 00063 HAL_TIMEx_HallSensor_Start_IT(). 00064 00065 @endverbatim 00066 ****************************************************************************** 00067 * @attention 00068 * 00069 * <h2><center>© Copyright (c) 2016 STMicroelectronics. 00070 * All rights reserved.</center></h2> 00071 * 00072 * This software component is licensed by ST under BSD 3-Clause license, 00073 * the "License"; You may not use this file except in compliance with the 00074 * License. You may obtain a copy of the License at: 00075 * opensource.org/licenses/BSD-3-Clause 00076 * 00077 ****************************************************************************** 00078 */ 00079 00080 /* Includes ------------------------------------------------------------------*/ 00081 #include "stm32f1xx_hal.h" 00082 00083 /** @addtogroup STM32F1xx_HAL_Driver 00084 * @{ 00085 */ 00086 00087 /** @defgroup TIMEx TIMEx 00088 * @brief TIM Extended HAL module driver 00089 * @{ 00090 */ 00091 00092 #ifdef HAL_TIM_MODULE_ENABLED 00093 00094 /* Private typedef -----------------------------------------------------------*/ 00095 /* Private define ------------------------------------------------------------*/ 00096 /* Private macros ------------------------------------------------------------*/ 00097 /* Private variables ---------------------------------------------------------*/ 00098 /* Private function prototypes -----------------------------------------------*/ 00099 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma); 00100 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma); 00101 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState); 00102 00103 /* Exported functions --------------------------------------------------------*/ 00104 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions 00105 * @{ 00106 */ 00107 00108 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 00109 * @brief Timer Hall Sensor functions 00110 * 00111 @verbatim 00112 ============================================================================== 00113 ##### Timer Hall Sensor functions ##### 00114 ============================================================================== 00115 [..] 00116 This section provides functions allowing to: 00117 (+) Initialize and configure TIM HAL Sensor. 00118 (+) De-initialize TIM HAL Sensor. 00119 (+) Start the Hall Sensor Interface. 00120 (+) Stop the Hall Sensor Interface. 00121 (+) Start the Hall Sensor Interface and enable interrupts. 00122 (+) Stop the Hall Sensor Interface and disable interrupts. 00123 (+) Start the Hall Sensor Interface and enable DMA transfers. 00124 (+) Stop the Hall Sensor Interface and disable DMA transfers. 00125 00126 @endverbatim 00127 * @{ 00128 */ 00129 /** 00130 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. 00131 * @note When the timer instance is initialized in Hall Sensor Interface mode, 00132 * timer channels 1 and channel 2 are reserved and cannot be used for 00133 * other purpose. 00134 * @param htim TIM Hall Sensor Interface handle 00135 * @param sConfig TIM Hall Sensor configuration structure 00136 * @retval HAL status 00137 */ 00138 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig) 00139 { 00140 TIM_OC_InitTypeDef OC_Config; 00141 00142 /* Check the TIM handle allocation */ 00143 if (htim == NULL) 00144 { 00145 return HAL_ERROR; 00146 } 00147 00148 /* Check the parameters */ 00149 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); 00150 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); 00151 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); 00152 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); 00153 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); 00154 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); 00155 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); 00156 00157 if (htim->State == HAL_TIM_STATE_RESET) 00158 { 00159 /* Allocate lock resource and initialize it */ 00160 htim->Lock = HAL_UNLOCKED; 00161 00162 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) 00163 /* Reset interrupt callbacks to legacy week callbacks */ 00164 TIM_ResetCallback(htim); 00165 00166 if (htim->HallSensor_MspInitCallback == NULL) 00167 { 00168 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; 00169 } 00170 /* Init the low level hardware : GPIO, CLOCK, NVIC */ 00171 htim->HallSensor_MspInitCallback(htim); 00172 #else 00173 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ 00174 HAL_TIMEx_HallSensor_MspInit(htim); 00175 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 00176 } 00177 00178 /* Set the TIM state */ 00179 htim->State = HAL_TIM_STATE_BUSY; 00180 00181 /* Configure the Time base in the Encoder Mode */ 00182 TIM_Base_SetConfig(htim->Instance, &htim->Init); 00183 00184 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ 00185 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); 00186 00187 /* Reset the IC1PSC Bits */ 00188 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; 00189 /* Set the IC1PSC value */ 00190 htim->Instance->CCMR1 |= sConfig->IC1Prescaler; 00191 00192 /* Enable the Hall sensor interface (XOR function of the three inputs) */ 00193 htim->Instance->CR2 |= TIM_CR2_TI1S; 00194 00195 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ 00196 htim->Instance->SMCR &= ~TIM_SMCR_TS; 00197 htim->Instance->SMCR |= TIM_TS_TI1F_ED; 00198 00199 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ 00200 htim->Instance->SMCR &= ~TIM_SMCR_SMS; 00201 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; 00202 00203 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ 00204 OC_Config.OCFastMode = TIM_OCFAST_DISABLE; 00205 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; 00206 OC_Config.OCMode = TIM_OCMODE_PWM2; 00207 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; 00208 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; 00209 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; 00210 OC_Config.Pulse = sConfig->Commutation_Delay; 00211 00212 TIM_OC2_SetConfig(htim->Instance, &OC_Config); 00213 00214 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 00215 register to 101 */ 00216 htim->Instance->CR2 &= ~TIM_CR2_MMS; 00217 htim->Instance->CR2 |= TIM_TRGO_OC2REF; 00218 00219 /* Initialize the DMA burst operation state */ 00220 htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 00221 00222 /* Initialize the TIM channels state */ 00223 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00224 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 00225 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00226 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 00227 00228 /* Initialize the TIM state*/ 00229 htim->State = HAL_TIM_STATE_READY; 00230 00231 return HAL_OK; 00232 } 00233 00234 /** 00235 * @brief DeInitializes the TIM Hall Sensor interface 00236 * @param htim TIM Hall Sensor Interface handle 00237 * @retval HAL status 00238 */ 00239 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) 00240 { 00241 /* Check the parameters */ 00242 assert_param(IS_TIM_INSTANCE(htim->Instance)); 00243 00244 htim->State = HAL_TIM_STATE_BUSY; 00245 00246 /* Disable the TIM Peripheral Clock */ 00247 __HAL_TIM_DISABLE(htim); 00248 00249 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) 00250 if (htim->HallSensor_MspDeInitCallback == NULL) 00251 { 00252 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; 00253 } 00254 /* DeInit the low level hardware */ 00255 htim->HallSensor_MspDeInitCallback(htim); 00256 #else 00257 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ 00258 HAL_TIMEx_HallSensor_MspDeInit(htim); 00259 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 00260 00261 /* Change the DMA burst operation state */ 00262 htim->DMABurstState = HAL_DMA_BURST_STATE_RESET; 00263 00264 /* Change the TIM channels state */ 00265 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); 00266 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); 00267 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_RESET); 00268 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_RESET); 00269 00270 /* Change TIM state */ 00271 htim->State = HAL_TIM_STATE_RESET; 00272 00273 /* Release Lock */ 00274 __HAL_UNLOCK(htim); 00275 00276 return HAL_OK; 00277 } 00278 00279 /** 00280 * @brief Initializes the TIM Hall Sensor MSP. 00281 * @param htim TIM Hall Sensor Interface handle 00282 * @retval None 00283 */ 00284 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) 00285 { 00286 /* Prevent unused argument(s) compilation warning */ 00287 UNUSED(htim); 00288 00289 /* NOTE : This function should not be modified, when the callback is needed, 00290 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file 00291 */ 00292 } 00293 00294 /** 00295 * @brief DeInitializes TIM Hall Sensor MSP. 00296 * @param htim TIM Hall Sensor Interface handle 00297 * @retval None 00298 */ 00299 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) 00300 { 00301 /* Prevent unused argument(s) compilation warning */ 00302 UNUSED(htim); 00303 00304 /* NOTE : This function should not be modified, when the callback is needed, 00305 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file 00306 */ 00307 } 00308 00309 /** 00310 * @brief Starts the TIM Hall Sensor Interface. 00311 * @param htim TIM Hall Sensor Interface handle 00312 * @retval HAL status 00313 */ 00314 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) 00315 { 00316 uint32_t tmpsmcr; 00317 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); 00318 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); 00319 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); 00320 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); 00321 00322 /* Check the parameters */ 00323 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); 00324 00325 /* Check the TIM channels state */ 00326 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 00327 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 00328 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 00329 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) 00330 { 00331 return HAL_ERROR; 00332 } 00333 00334 /* Set the TIM channels state */ 00335 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 00336 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 00337 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 00338 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 00339 00340 /* Enable the Input Capture channel 1 00341 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, 00342 TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00343 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 00344 00345 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 00346 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 00347 { 00348 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 00349 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 00350 { 00351 __HAL_TIM_ENABLE(htim); 00352 } 00353 } 00354 else 00355 { 00356 __HAL_TIM_ENABLE(htim); 00357 } 00358 00359 /* Return function status */ 00360 return HAL_OK; 00361 } 00362 00363 /** 00364 * @brief Stops the TIM Hall sensor Interface. 00365 * @param htim TIM Hall Sensor Interface handle 00366 * @retval HAL status 00367 */ 00368 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) 00369 { 00370 /* Check the parameters */ 00371 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); 00372 00373 /* Disable the Input Capture channels 1, 2 and 3 00374 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, 00375 TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00376 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 00377 00378 /* Disable the Peripheral */ 00379 __HAL_TIM_DISABLE(htim); 00380 00381 /* Set the TIM channels state */ 00382 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00383 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 00384 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00385 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 00386 00387 /* Return function status */ 00388 return HAL_OK; 00389 } 00390 00391 /** 00392 * @brief Starts the TIM Hall Sensor Interface in interrupt mode. 00393 * @param htim TIM Hall Sensor Interface handle 00394 * @retval HAL status 00395 */ 00396 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) 00397 { 00398 uint32_t tmpsmcr; 00399 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); 00400 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); 00401 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); 00402 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); 00403 00404 /* Check the parameters */ 00405 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); 00406 00407 /* Check the TIM channels state */ 00408 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 00409 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 00410 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 00411 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) 00412 { 00413 return HAL_ERROR; 00414 } 00415 00416 /* Set the TIM channels state */ 00417 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 00418 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 00419 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 00420 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 00421 00422 /* Enable the capture compare Interrupts 1 event */ 00423 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 00424 00425 /* Enable the Input Capture channel 1 00426 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, 00427 TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00428 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 00429 00430 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 00431 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 00432 { 00433 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 00434 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 00435 { 00436 __HAL_TIM_ENABLE(htim); 00437 } 00438 } 00439 else 00440 { 00441 __HAL_TIM_ENABLE(htim); 00442 } 00443 00444 /* Return function status */ 00445 return HAL_OK; 00446 } 00447 00448 /** 00449 * @brief Stops the TIM Hall Sensor Interface in interrupt mode. 00450 * @param htim TIM Hall Sensor Interface handle 00451 * @retval HAL status 00452 */ 00453 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) 00454 { 00455 /* Check the parameters */ 00456 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); 00457 00458 /* Disable the Input Capture channel 1 00459 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, 00460 TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00461 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 00462 00463 /* Disable the capture compare Interrupts event */ 00464 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 00465 00466 /* Disable the Peripheral */ 00467 __HAL_TIM_DISABLE(htim); 00468 00469 /* Set the TIM channels state */ 00470 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00471 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 00472 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00473 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 00474 00475 /* Return function status */ 00476 return HAL_OK; 00477 } 00478 00479 /** 00480 * @brief Starts the TIM Hall Sensor Interface in DMA mode. 00481 * @param htim TIM Hall Sensor Interface handle 00482 * @param pData The destination Buffer address. 00483 * @param Length The length of data to be transferred from TIM peripheral to memory. 00484 * @retval HAL status 00485 */ 00486 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) 00487 { 00488 uint32_t tmpsmcr; 00489 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); 00490 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); 00491 00492 /* Check the parameters */ 00493 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); 00494 00495 /* Set the TIM channel state */ 00496 if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY) 00497 || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)) 00498 { 00499 return HAL_BUSY; 00500 } 00501 else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY) 00502 && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY)) 00503 { 00504 if ((pData == NULL) && (Length > 0U)) 00505 { 00506 return HAL_ERROR; 00507 } 00508 else 00509 { 00510 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 00511 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 00512 } 00513 } 00514 else 00515 { 00516 return HAL_ERROR; 00517 } 00518 00519 /* Enable the Input Capture channel 1 00520 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, 00521 TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00522 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); 00523 00524 /* Set the DMA Input Capture 1 Callbacks */ 00525 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; 00526 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt; 00527 /* Set the DMA error callback */ 00528 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; 00529 00530 /* Enable the DMA channel for Capture 1*/ 00531 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK) 00532 { 00533 /* Return error status */ 00534 return HAL_ERROR; 00535 } 00536 /* Enable the capture compare 1 Interrupt */ 00537 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); 00538 00539 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 00540 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 00541 { 00542 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 00543 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 00544 { 00545 __HAL_TIM_ENABLE(htim); 00546 } 00547 } 00548 else 00549 { 00550 __HAL_TIM_ENABLE(htim); 00551 } 00552 00553 /* Return function status */ 00554 return HAL_OK; 00555 } 00556 00557 /** 00558 * @brief Stops the TIM Hall Sensor Interface in DMA mode. 00559 * @param htim TIM Hall Sensor Interface handle 00560 * @retval HAL status 00561 */ 00562 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) 00563 { 00564 /* Check the parameters */ 00565 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); 00566 00567 /* Disable the Input Capture channel 1 00568 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, 00569 TIM_CHANNEL_2 and TIM_CHANNEL_3) */ 00570 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); 00571 00572 00573 /* Disable the capture compare Interrupts 1 event */ 00574 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); 00575 00576 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); 00577 00578 /* Disable the Peripheral */ 00579 __HAL_TIM_DISABLE(htim); 00580 00581 /* Set the TIM channel state */ 00582 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00583 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 00584 00585 /* Return function status */ 00586 return HAL_OK; 00587 } 00588 00589 /** 00590 * @} 00591 */ 00592 00593 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 00594 * @brief Timer Complementary Output Compare functions 00595 * 00596 @verbatim 00597 ============================================================================== 00598 ##### Timer Complementary Output Compare functions ##### 00599 ============================================================================== 00600 [..] 00601 This section provides functions allowing to: 00602 (+) Start the Complementary Output Compare/PWM. 00603 (+) Stop the Complementary Output Compare/PWM. 00604 (+) Start the Complementary Output Compare/PWM and enable interrupts. 00605 (+) Stop the Complementary Output Compare/PWM and disable interrupts. 00606 (+) Start the Complementary Output Compare/PWM and enable DMA transfers. 00607 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. 00608 00609 @endverbatim 00610 * @{ 00611 */ 00612 00613 /** 00614 * @brief Starts the TIM Output Compare signal generation on the complementary 00615 * output. 00616 * @param htim TIM Output Compare handle 00617 * @param Channel TIM Channel to be enabled 00618 * This parameter can be one of the following values: 00619 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00620 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00621 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00622 * @retval HAL status 00623 */ 00624 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) 00625 { 00626 uint32_t tmpsmcr; 00627 00628 /* Check the parameters */ 00629 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00630 00631 /* Check the TIM complementary channel state */ 00632 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 00633 { 00634 return HAL_ERROR; 00635 } 00636 00637 /* Set the TIM complementary channel state */ 00638 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 00639 00640 /* Enable the Capture compare channel N */ 00641 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 00642 00643 /* Enable the Main Output */ 00644 __HAL_TIM_MOE_ENABLE(htim); 00645 00646 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 00647 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 00648 { 00649 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 00650 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 00651 { 00652 __HAL_TIM_ENABLE(htim); 00653 } 00654 } 00655 else 00656 { 00657 __HAL_TIM_ENABLE(htim); 00658 } 00659 00660 /* Return function status */ 00661 return HAL_OK; 00662 } 00663 00664 /** 00665 * @brief Stops the TIM Output Compare signal generation on the complementary 00666 * output. 00667 * @param htim TIM handle 00668 * @param Channel TIM Channel to be disabled 00669 * This parameter can be one of the following values: 00670 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00671 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00672 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00673 * @retval HAL status 00674 */ 00675 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) 00676 { 00677 /* Check the parameters */ 00678 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00679 00680 /* Disable the Capture compare channel N */ 00681 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 00682 00683 /* Disable the Main Output */ 00684 __HAL_TIM_MOE_DISABLE(htim); 00685 00686 /* Disable the Peripheral */ 00687 __HAL_TIM_DISABLE(htim); 00688 00689 /* Set the TIM complementary channel state */ 00690 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 00691 00692 /* Return function status */ 00693 return HAL_OK; 00694 } 00695 00696 /** 00697 * @brief Starts the TIM Output Compare signal generation in interrupt mode 00698 * on the complementary output. 00699 * @param htim TIM OC handle 00700 * @param Channel TIM Channel to be enabled 00701 * This parameter can be one of the following values: 00702 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00703 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00704 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00705 * @retval HAL status 00706 */ 00707 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 00708 { 00709 uint32_t tmpsmcr; 00710 00711 /* Check the parameters */ 00712 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00713 00714 /* Check the TIM complementary channel state */ 00715 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 00716 { 00717 return HAL_ERROR; 00718 } 00719 00720 /* Set the TIM complementary channel state */ 00721 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 00722 00723 switch (Channel) 00724 { 00725 case TIM_CHANNEL_1: 00726 { 00727 /* Enable the TIM Output Compare interrupt */ 00728 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 00729 break; 00730 } 00731 00732 case TIM_CHANNEL_2: 00733 { 00734 /* Enable the TIM Output Compare interrupt */ 00735 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 00736 break; 00737 } 00738 00739 case TIM_CHANNEL_3: 00740 { 00741 /* Enable the TIM Output Compare interrupt */ 00742 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); 00743 break; 00744 } 00745 00746 00747 default: 00748 break; 00749 } 00750 00751 /* Enable the TIM Break interrupt */ 00752 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); 00753 00754 /* Enable the Capture compare channel N */ 00755 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 00756 00757 /* Enable the Main Output */ 00758 __HAL_TIM_MOE_ENABLE(htim); 00759 00760 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 00761 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 00762 { 00763 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 00764 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 00765 { 00766 __HAL_TIM_ENABLE(htim); 00767 } 00768 } 00769 else 00770 { 00771 __HAL_TIM_ENABLE(htim); 00772 } 00773 00774 /* Return function status */ 00775 return HAL_OK; 00776 } 00777 00778 /** 00779 * @brief Stops the TIM Output Compare signal generation in interrupt mode 00780 * on the complementary output. 00781 * @param htim TIM Output Compare handle 00782 * @param Channel TIM Channel to be disabled 00783 * This parameter can be one of the following values: 00784 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00785 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00786 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00787 * @retval HAL status 00788 */ 00789 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 00790 { 00791 uint32_t tmpccer; 00792 /* Check the parameters */ 00793 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00794 00795 switch (Channel) 00796 { 00797 case TIM_CHANNEL_1: 00798 { 00799 /* Disable the TIM Output Compare interrupt */ 00800 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 00801 break; 00802 } 00803 00804 case TIM_CHANNEL_2: 00805 { 00806 /* Disable the TIM Output Compare interrupt */ 00807 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); 00808 break; 00809 } 00810 00811 case TIM_CHANNEL_3: 00812 { 00813 /* Disable the TIM Output Compare interrupt */ 00814 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); 00815 break; 00816 } 00817 00818 default: 00819 break; 00820 } 00821 00822 /* Disable the Capture compare channel N */ 00823 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 00824 00825 /* Disable the TIM Break interrupt (only if no more channel is active) */ 00826 tmpccer = htim->Instance->CCER; 00827 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) 00828 { 00829 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); 00830 } 00831 00832 /* Disable the Main Output */ 00833 __HAL_TIM_MOE_DISABLE(htim); 00834 00835 /* Disable the Peripheral */ 00836 __HAL_TIM_DISABLE(htim); 00837 00838 /* Set the TIM complementary channel state */ 00839 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 00840 00841 /* Return function status */ 00842 return HAL_OK; 00843 } 00844 00845 /** 00846 * @brief Starts the TIM Output Compare signal generation in DMA mode 00847 * on the complementary output. 00848 * @param htim TIM Output Compare handle 00849 * @param Channel TIM Channel to be enabled 00850 * This parameter can be one of the following values: 00851 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00852 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00853 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00854 * @param pData The source Buffer address. 00855 * @param Length The length of data to be transferred from memory to TIM peripheral 00856 * @retval HAL status 00857 */ 00858 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) 00859 { 00860 uint32_t tmpsmcr; 00861 00862 /* Check the parameters */ 00863 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00864 00865 /* Set the TIM complementary channel state */ 00866 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) 00867 { 00868 return HAL_BUSY; 00869 } 00870 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) 00871 { 00872 if ((pData == NULL) && (Length > 0U)) 00873 { 00874 return HAL_ERROR; 00875 } 00876 else 00877 { 00878 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 00879 } 00880 } 00881 else 00882 { 00883 return HAL_ERROR; 00884 } 00885 00886 switch (Channel) 00887 { 00888 case TIM_CHANNEL_1: 00889 { 00890 /* Set the DMA compare callbacks */ 00891 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; 00892 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 00893 00894 /* Set the DMA error callback */ 00895 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; 00896 00897 /* Enable the DMA channel */ 00898 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, 00899 Length) != HAL_OK) 00900 { 00901 /* Return error status */ 00902 return HAL_ERROR; 00903 } 00904 /* Enable the TIM Output Compare DMA request */ 00905 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); 00906 break; 00907 } 00908 00909 case TIM_CHANNEL_2: 00910 { 00911 /* Set the DMA compare callbacks */ 00912 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; 00913 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 00914 00915 /* Set the DMA error callback */ 00916 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; 00917 00918 /* Enable the DMA channel */ 00919 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, 00920 Length) != HAL_OK) 00921 { 00922 /* Return error status */ 00923 return HAL_ERROR; 00924 } 00925 /* Enable the TIM Output Compare DMA request */ 00926 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); 00927 break; 00928 } 00929 00930 case TIM_CHANNEL_3: 00931 { 00932 /* Set the DMA compare callbacks */ 00933 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; 00934 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 00935 00936 /* Set the DMA error callback */ 00937 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; 00938 00939 /* Enable the DMA channel */ 00940 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, 00941 Length) != HAL_OK) 00942 { 00943 /* Return error status */ 00944 return HAL_ERROR; 00945 } 00946 /* Enable the TIM Output Compare DMA request */ 00947 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); 00948 break; 00949 } 00950 00951 default: 00952 break; 00953 } 00954 00955 /* Enable the Capture compare channel N */ 00956 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 00957 00958 /* Enable the Main Output */ 00959 __HAL_TIM_MOE_ENABLE(htim); 00960 00961 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 00962 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 00963 { 00964 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 00965 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 00966 { 00967 __HAL_TIM_ENABLE(htim); 00968 } 00969 } 00970 else 00971 { 00972 __HAL_TIM_ENABLE(htim); 00973 } 00974 00975 /* Return function status */ 00976 return HAL_OK; 00977 } 00978 00979 /** 00980 * @brief Stops the TIM Output Compare signal generation in DMA mode 00981 * on the complementary output. 00982 * @param htim TIM Output Compare handle 00983 * @param Channel TIM Channel to be disabled 00984 * This parameter can be one of the following values: 00985 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 00986 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 00987 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 00988 * @retval HAL status 00989 */ 00990 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) 00991 { 00992 /* Check the parameters */ 00993 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 00994 00995 switch (Channel) 00996 { 00997 case TIM_CHANNEL_1: 00998 { 00999 /* Disable the TIM Output Compare DMA request */ 01000 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); 01001 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); 01002 break; 01003 } 01004 01005 case TIM_CHANNEL_2: 01006 { 01007 /* Disable the TIM Output Compare DMA request */ 01008 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); 01009 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); 01010 break; 01011 } 01012 01013 case TIM_CHANNEL_3: 01014 { 01015 /* Disable the TIM Output Compare DMA request */ 01016 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); 01017 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); 01018 break; 01019 } 01020 01021 default: 01022 break; 01023 } 01024 01025 /* Disable the Capture compare channel N */ 01026 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 01027 01028 /* Disable the Main Output */ 01029 __HAL_TIM_MOE_DISABLE(htim); 01030 01031 /* Disable the Peripheral */ 01032 __HAL_TIM_DISABLE(htim); 01033 01034 /* Set the TIM complementary channel state */ 01035 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 01036 01037 /* Return function status */ 01038 return HAL_OK; 01039 } 01040 01041 /** 01042 * @} 01043 */ 01044 01045 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 01046 * @brief Timer Complementary PWM functions 01047 * 01048 @verbatim 01049 ============================================================================== 01050 ##### Timer Complementary PWM functions ##### 01051 ============================================================================== 01052 [..] 01053 This section provides functions allowing to: 01054 (+) Start the Complementary PWM. 01055 (+) Stop the Complementary PWM. 01056 (+) Start the Complementary PWM and enable interrupts. 01057 (+) Stop the Complementary PWM and disable interrupts. 01058 (+) Start the Complementary PWM and enable DMA transfers. 01059 (+) Stop the Complementary PWM and disable DMA transfers. 01060 (+) Start the Complementary Input Capture measurement. 01061 (+) Stop the Complementary Input Capture. 01062 (+) Start the Complementary Input Capture and enable interrupts. 01063 (+) Stop the Complementary Input Capture and disable interrupts. 01064 (+) Start the Complementary Input Capture and enable DMA transfers. 01065 (+) Stop the Complementary Input Capture and disable DMA transfers. 01066 (+) Start the Complementary One Pulse generation. 01067 (+) Stop the Complementary One Pulse. 01068 (+) Start the Complementary One Pulse and enable interrupts. 01069 (+) Stop the Complementary One Pulse and disable interrupts. 01070 01071 @endverbatim 01072 * @{ 01073 */ 01074 01075 /** 01076 * @brief Starts the PWM signal generation on the complementary output. 01077 * @param htim TIM handle 01078 * @param Channel TIM Channel to be enabled 01079 * This parameter can be one of the following values: 01080 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01081 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01082 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01083 * @retval HAL status 01084 */ 01085 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) 01086 { 01087 uint32_t tmpsmcr; 01088 01089 /* Check the parameters */ 01090 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01091 01092 /* Check the TIM complementary channel state */ 01093 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 01094 { 01095 return HAL_ERROR; 01096 } 01097 01098 /* Set the TIM complementary channel state */ 01099 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 01100 01101 /* Enable the complementary PWM output */ 01102 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 01103 01104 /* Enable the Main Output */ 01105 __HAL_TIM_MOE_ENABLE(htim); 01106 01107 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 01108 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 01109 { 01110 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 01111 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 01112 { 01113 __HAL_TIM_ENABLE(htim); 01114 } 01115 } 01116 else 01117 { 01118 __HAL_TIM_ENABLE(htim); 01119 } 01120 01121 /* Return function status */ 01122 return HAL_OK; 01123 } 01124 01125 /** 01126 * @brief Stops the PWM signal generation on the complementary output. 01127 * @param htim TIM handle 01128 * @param Channel TIM Channel to be disabled 01129 * This parameter can be one of the following values: 01130 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01131 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01132 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01133 * @retval HAL status 01134 */ 01135 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) 01136 { 01137 /* Check the parameters */ 01138 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01139 01140 /* Disable the complementary PWM output */ 01141 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 01142 01143 /* Disable the Main Output */ 01144 __HAL_TIM_MOE_DISABLE(htim); 01145 01146 /* Disable the Peripheral */ 01147 __HAL_TIM_DISABLE(htim); 01148 01149 /* Set the TIM complementary channel state */ 01150 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 01151 01152 /* Return function status */ 01153 return HAL_OK; 01154 } 01155 01156 /** 01157 * @brief Starts the PWM signal generation in interrupt mode on the 01158 * complementary output. 01159 * @param htim TIM handle 01160 * @param Channel TIM Channel to be disabled 01161 * This parameter can be one of the following values: 01162 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01163 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01164 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01165 * @retval HAL status 01166 */ 01167 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 01168 { 01169 uint32_t tmpsmcr; 01170 01171 /* Check the parameters */ 01172 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01173 01174 /* Check the TIM complementary channel state */ 01175 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY) 01176 { 01177 return HAL_ERROR; 01178 } 01179 01180 /* Set the TIM complementary channel state */ 01181 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 01182 01183 switch (Channel) 01184 { 01185 case TIM_CHANNEL_1: 01186 { 01187 /* Enable the TIM Capture/Compare 1 interrupt */ 01188 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 01189 break; 01190 } 01191 01192 case TIM_CHANNEL_2: 01193 { 01194 /* Enable the TIM Capture/Compare 2 interrupt */ 01195 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 01196 break; 01197 } 01198 01199 case TIM_CHANNEL_3: 01200 { 01201 /* Enable the TIM Capture/Compare 3 interrupt */ 01202 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); 01203 break; 01204 } 01205 01206 default: 01207 break; 01208 } 01209 01210 /* Enable the TIM Break interrupt */ 01211 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); 01212 01213 /* Enable the complementary PWM output */ 01214 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 01215 01216 /* Enable the Main Output */ 01217 __HAL_TIM_MOE_ENABLE(htim); 01218 01219 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 01220 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 01221 { 01222 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 01223 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 01224 { 01225 __HAL_TIM_ENABLE(htim); 01226 } 01227 } 01228 else 01229 { 01230 __HAL_TIM_ENABLE(htim); 01231 } 01232 01233 /* Return function status */ 01234 return HAL_OK; 01235 } 01236 01237 /** 01238 * @brief Stops the PWM signal generation in interrupt mode on the 01239 * complementary output. 01240 * @param htim TIM handle 01241 * @param Channel TIM Channel to be disabled 01242 * This parameter can be one of the following values: 01243 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01244 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01245 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01246 * @retval HAL status 01247 */ 01248 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) 01249 { 01250 uint32_t tmpccer; 01251 01252 /* Check the parameters */ 01253 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01254 01255 switch (Channel) 01256 { 01257 case TIM_CHANNEL_1: 01258 { 01259 /* Disable the TIM Capture/Compare 1 interrupt */ 01260 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 01261 break; 01262 } 01263 01264 case TIM_CHANNEL_2: 01265 { 01266 /* Disable the TIM Capture/Compare 2 interrupt */ 01267 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); 01268 break; 01269 } 01270 01271 case TIM_CHANNEL_3: 01272 { 01273 /* Disable the TIM Capture/Compare 3 interrupt */ 01274 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); 01275 break; 01276 } 01277 01278 default: 01279 break; 01280 } 01281 01282 /* Disable the complementary PWM output */ 01283 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 01284 01285 /* Disable the TIM Break interrupt (only if no more channel is active) */ 01286 tmpccer = htim->Instance->CCER; 01287 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET) 01288 { 01289 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); 01290 } 01291 01292 /* Disable the Main Output */ 01293 __HAL_TIM_MOE_DISABLE(htim); 01294 01295 /* Disable the Peripheral */ 01296 __HAL_TIM_DISABLE(htim); 01297 01298 /* Set the TIM complementary channel state */ 01299 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 01300 01301 /* Return function status */ 01302 return HAL_OK; 01303 } 01304 01305 /** 01306 * @brief Starts the TIM PWM signal generation in DMA mode on the 01307 * complementary output 01308 * @param htim TIM handle 01309 * @param Channel TIM Channel to be enabled 01310 * This parameter can be one of the following values: 01311 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01312 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01313 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01314 * @param pData The source Buffer address. 01315 * @param Length The length of data to be transferred from memory to TIM peripheral 01316 * @retval HAL status 01317 */ 01318 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) 01319 { 01320 uint32_t tmpsmcr; 01321 01322 /* Check the parameters */ 01323 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01324 01325 /* Set the TIM complementary channel state */ 01326 if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_BUSY) 01327 { 01328 return HAL_BUSY; 01329 } 01330 else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY) 01331 { 01332 if ((pData == NULL) && (Length > 0U)) 01333 { 01334 return HAL_ERROR; 01335 } 01336 else 01337 { 01338 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY); 01339 } 01340 } 01341 else 01342 { 01343 return HAL_ERROR; 01344 } 01345 01346 switch (Channel) 01347 { 01348 case TIM_CHANNEL_1: 01349 { 01350 /* Set the DMA compare callbacks */ 01351 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt; 01352 htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 01353 01354 /* Set the DMA error callback */ 01355 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; 01356 01357 /* Enable the DMA channel */ 01358 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, 01359 Length) != HAL_OK) 01360 { 01361 /* Return error status */ 01362 return HAL_ERROR; 01363 } 01364 /* Enable the TIM Capture/Compare 1 DMA request */ 01365 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); 01366 break; 01367 } 01368 01369 case TIM_CHANNEL_2: 01370 { 01371 /* Set the DMA compare callbacks */ 01372 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt; 01373 htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 01374 01375 /* Set the DMA error callback */ 01376 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; 01377 01378 /* Enable the DMA channel */ 01379 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, 01380 Length) != HAL_OK) 01381 { 01382 /* Return error status */ 01383 return HAL_ERROR; 01384 } 01385 /* Enable the TIM Capture/Compare 2 DMA request */ 01386 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); 01387 break; 01388 } 01389 01390 case TIM_CHANNEL_3: 01391 { 01392 /* Set the DMA compare callbacks */ 01393 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt; 01394 htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt; 01395 01396 /* Set the DMA error callback */ 01397 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; 01398 01399 /* Enable the DMA channel */ 01400 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, 01401 Length) != HAL_OK) 01402 { 01403 /* Return error status */ 01404 return HAL_ERROR; 01405 } 01406 /* Enable the TIM Capture/Compare 3 DMA request */ 01407 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); 01408 break; 01409 } 01410 01411 default: 01412 break; 01413 } 01414 01415 /* Enable the complementary PWM output */ 01416 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); 01417 01418 /* Enable the Main Output */ 01419 __HAL_TIM_MOE_ENABLE(htim); 01420 01421 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ 01422 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 01423 { 01424 tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 01425 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 01426 { 01427 __HAL_TIM_ENABLE(htim); 01428 } 01429 } 01430 else 01431 { 01432 __HAL_TIM_ENABLE(htim); 01433 } 01434 01435 /* Return function status */ 01436 return HAL_OK; 01437 } 01438 01439 /** 01440 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary 01441 * output 01442 * @param htim TIM handle 01443 * @param Channel TIM Channel to be disabled 01444 * This parameter can be one of the following values: 01445 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01446 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01447 * @arg TIM_CHANNEL_3: TIM Channel 3 selected 01448 * @retval HAL status 01449 */ 01450 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) 01451 { 01452 /* Check the parameters */ 01453 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); 01454 01455 switch (Channel) 01456 { 01457 case TIM_CHANNEL_1: 01458 { 01459 /* Disable the TIM Capture/Compare 1 DMA request */ 01460 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); 01461 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]); 01462 break; 01463 } 01464 01465 case TIM_CHANNEL_2: 01466 { 01467 /* Disable the TIM Capture/Compare 2 DMA request */ 01468 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); 01469 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]); 01470 break; 01471 } 01472 01473 case TIM_CHANNEL_3: 01474 { 01475 /* Disable the TIM Capture/Compare 3 DMA request */ 01476 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); 01477 (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]); 01478 break; 01479 } 01480 01481 default: 01482 break; 01483 } 01484 01485 /* Disable the complementary PWM output */ 01486 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); 01487 01488 /* Disable the Main Output */ 01489 __HAL_TIM_MOE_DISABLE(htim); 01490 01491 /* Disable the Peripheral */ 01492 __HAL_TIM_DISABLE(htim); 01493 01494 /* Set the TIM complementary channel state */ 01495 TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); 01496 01497 /* Return function status */ 01498 return HAL_OK; 01499 } 01500 01501 /** 01502 * @} 01503 */ 01504 01505 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 01506 * @brief Timer Complementary One Pulse functions 01507 * 01508 @verbatim 01509 ============================================================================== 01510 ##### Timer Complementary One Pulse functions ##### 01511 ============================================================================== 01512 [..] 01513 This section provides functions allowing to: 01514 (+) Start the Complementary One Pulse generation. 01515 (+) Stop the Complementary One Pulse. 01516 (+) Start the Complementary One Pulse and enable interrupts. 01517 (+) Stop the Complementary One Pulse and disable interrupts. 01518 01519 @endverbatim 01520 * @{ 01521 */ 01522 01523 /** 01524 * @brief Starts the TIM One Pulse signal generation on the complementary 01525 * output. 01526 * @note OutputChannel must match the pulse output channel chosen when calling 01527 * @ref HAL_TIM_OnePulse_ConfigChannel(). 01528 * @param htim TIM One Pulse handle 01529 * @param OutputChannel pulse output channel to enable 01530 * This parameter can be one of the following values: 01531 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01532 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01533 * @retval HAL status 01534 */ 01535 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01536 { 01537 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; 01538 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); 01539 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); 01540 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); 01541 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); 01542 01543 /* Check the parameters */ 01544 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01545 01546 /* Check the TIM channels state */ 01547 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 01548 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 01549 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 01550 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) 01551 { 01552 return HAL_ERROR; 01553 } 01554 01555 /* Set the TIM channels state */ 01556 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 01557 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 01558 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 01559 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 01560 01561 /* Enable the complementary One Pulse output channel and the Input Capture channel */ 01562 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); 01563 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); 01564 01565 /* Enable the Main Output */ 01566 __HAL_TIM_MOE_ENABLE(htim); 01567 01568 /* Return function status */ 01569 return HAL_OK; 01570 } 01571 01572 /** 01573 * @brief Stops the TIM One Pulse signal generation on the complementary 01574 * output. 01575 * @note OutputChannel must match the pulse output channel chosen when calling 01576 * @ref HAL_TIM_OnePulse_ConfigChannel(). 01577 * @param htim TIM One Pulse handle 01578 * @param OutputChannel pulse output channel to disable 01579 * This parameter can be one of the following values: 01580 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01581 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01582 * @retval HAL status 01583 */ 01584 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01585 { 01586 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; 01587 01588 /* Check the parameters */ 01589 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01590 01591 /* Disable the complementary One Pulse output channel and the Input Capture channel */ 01592 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); 01593 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); 01594 01595 /* Disable the Main Output */ 01596 __HAL_TIM_MOE_DISABLE(htim); 01597 01598 /* Disable the Peripheral */ 01599 __HAL_TIM_DISABLE(htim); 01600 01601 /* Set the TIM channels state */ 01602 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 01603 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 01604 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 01605 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 01606 01607 /* Return function status */ 01608 return HAL_OK; 01609 } 01610 01611 /** 01612 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the 01613 * complementary channel. 01614 * @note OutputChannel must match the pulse output channel chosen when calling 01615 * @ref HAL_TIM_OnePulse_ConfigChannel(). 01616 * @param htim TIM One Pulse handle 01617 * @param OutputChannel pulse output channel to enable 01618 * This parameter can be one of the following values: 01619 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01620 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01621 * @retval HAL status 01622 */ 01623 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01624 { 01625 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; 01626 HAL_TIM_ChannelStateTypeDef channel_1_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_1); 01627 HAL_TIM_ChannelStateTypeDef channel_2_state = TIM_CHANNEL_STATE_GET(htim, TIM_CHANNEL_2); 01628 HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1); 01629 HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2); 01630 01631 /* Check the parameters */ 01632 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01633 01634 /* Check the TIM channels state */ 01635 if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 01636 || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) 01637 || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) 01638 || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) 01639 { 01640 return HAL_ERROR; 01641 } 01642 01643 /* Set the TIM channels state */ 01644 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 01645 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 01646 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY); 01647 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); 01648 01649 /* Enable the TIM Capture/Compare 1 interrupt */ 01650 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); 01651 01652 /* Enable the TIM Capture/Compare 2 interrupt */ 01653 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); 01654 01655 /* Enable the complementary One Pulse output channel and the Input Capture channel */ 01656 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); 01657 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE); 01658 01659 /* Enable the Main Output */ 01660 __HAL_TIM_MOE_ENABLE(htim); 01661 01662 /* Return function status */ 01663 return HAL_OK; 01664 } 01665 01666 /** 01667 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the 01668 * complementary channel. 01669 * @note OutputChannel must match the pulse output channel chosen when calling 01670 * @ref HAL_TIM_OnePulse_ConfigChannel(). 01671 * @param htim TIM One Pulse handle 01672 * @param OutputChannel pulse output channel to disable 01673 * This parameter can be one of the following values: 01674 * @arg TIM_CHANNEL_1: TIM Channel 1 selected 01675 * @arg TIM_CHANNEL_2: TIM Channel 2 selected 01676 * @retval HAL status 01677 */ 01678 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) 01679 { 01680 uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1; 01681 01682 /* Check the parameters */ 01683 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); 01684 01685 /* Disable the TIM Capture/Compare 1 interrupt */ 01686 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); 01687 01688 /* Disable the TIM Capture/Compare 2 interrupt */ 01689 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); 01690 01691 /* Disable the complementary One Pulse output channel and the Input Capture channel */ 01692 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); 01693 TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE); 01694 01695 /* Disable the Main Output */ 01696 __HAL_TIM_MOE_DISABLE(htim); 01697 01698 /* Disable the Peripheral */ 01699 __HAL_TIM_DISABLE(htim); 01700 01701 /* Set the TIM channels state */ 01702 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 01703 TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 01704 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 01705 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 01706 01707 /* Return function status */ 01708 return HAL_OK; 01709 } 01710 01711 /** 01712 * @} 01713 */ 01714 01715 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 01716 * @brief Peripheral Control functions 01717 * 01718 @verbatim 01719 ============================================================================== 01720 ##### Peripheral Control functions ##### 01721 ============================================================================== 01722 [..] 01723 This section provides functions allowing to: 01724 (+) Configure the commutation event in case of use of the Hall sensor interface. 01725 (+) Configure Output channels for OC and PWM mode. 01726 01727 (+) Configure Complementary channels, break features and dead time. 01728 (+) Configure Master synchronization. 01729 (+) Configure timer remapping capabilities. 01730 01731 @endverbatim 01732 * @{ 01733 */ 01734 01735 /** 01736 * @brief Configure the TIM commutation event sequence. 01737 * @note This function is mandatory to use the commutation event in order to 01738 * update the configuration at each commutation detection on the TRGI input of the Timer, 01739 * the typical use of this feature is with the use of another Timer(interface Timer) 01740 * configured in Hall sensor interface, this interface Timer will generate the 01741 * commutation at its TRGO output (connected to Timer used in this function) each time 01742 * the TI1 of the Interface Timer detect a commutation at its input TI1. 01743 * @param htim TIM handle 01744 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor 01745 * This parameter can be one of the following values: 01746 * @arg TIM_TS_ITR0: Internal trigger 0 selected 01747 * @arg TIM_TS_ITR1: Internal trigger 1 selected 01748 * @arg TIM_TS_ITR2: Internal trigger 2 selected 01749 * @arg TIM_TS_ITR3: Internal trigger 3 selected 01750 * @arg TIM_TS_NONE: No trigger is needed 01751 * @param CommutationSource the Commutation Event source 01752 * This parameter can be one of the following values: 01753 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer 01754 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit 01755 * @retval HAL status 01756 */ 01757 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 01758 uint32_t CommutationSource) 01759 { 01760 /* Check the parameters */ 01761 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); 01762 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); 01763 01764 __HAL_LOCK(htim); 01765 01766 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || 01767 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) 01768 { 01769 /* Select the Input trigger */ 01770 htim->Instance->SMCR &= ~TIM_SMCR_TS; 01771 htim->Instance->SMCR |= InputTrigger; 01772 } 01773 01774 /* Select the Capture Compare preload feature */ 01775 htim->Instance->CR2 |= TIM_CR2_CCPC; 01776 /* Select the Commutation event source */ 01777 htim->Instance->CR2 &= ~TIM_CR2_CCUS; 01778 htim->Instance->CR2 |= CommutationSource; 01779 01780 /* Disable Commutation Interrupt */ 01781 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); 01782 01783 /* Disable Commutation DMA request */ 01784 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); 01785 01786 __HAL_UNLOCK(htim); 01787 01788 return HAL_OK; 01789 } 01790 01791 /** 01792 * @brief Configure the TIM commutation event sequence with interrupt. 01793 * @note This function is mandatory to use the commutation event in order to 01794 * update the configuration at each commutation detection on the TRGI input of the Timer, 01795 * the typical use of this feature is with the use of another Timer(interface Timer) 01796 * configured in Hall sensor interface, this interface Timer will generate the 01797 * commutation at its TRGO output (connected to Timer used in this function) each time 01798 * the TI1 of the Interface Timer detect a commutation at its input TI1. 01799 * @param htim TIM handle 01800 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor 01801 * This parameter can be one of the following values: 01802 * @arg TIM_TS_ITR0: Internal trigger 0 selected 01803 * @arg TIM_TS_ITR1: Internal trigger 1 selected 01804 * @arg TIM_TS_ITR2: Internal trigger 2 selected 01805 * @arg TIM_TS_ITR3: Internal trigger 3 selected 01806 * @arg TIM_TS_NONE: No trigger is needed 01807 * @param CommutationSource the Commutation Event source 01808 * This parameter can be one of the following values: 01809 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer 01810 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit 01811 * @retval HAL status 01812 */ 01813 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 01814 uint32_t CommutationSource) 01815 { 01816 /* Check the parameters */ 01817 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); 01818 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); 01819 01820 __HAL_LOCK(htim); 01821 01822 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || 01823 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) 01824 { 01825 /* Select the Input trigger */ 01826 htim->Instance->SMCR &= ~TIM_SMCR_TS; 01827 htim->Instance->SMCR |= InputTrigger; 01828 } 01829 01830 /* Select the Capture Compare preload feature */ 01831 htim->Instance->CR2 |= TIM_CR2_CCPC; 01832 /* Select the Commutation event source */ 01833 htim->Instance->CR2 &= ~TIM_CR2_CCUS; 01834 htim->Instance->CR2 |= CommutationSource; 01835 01836 /* Disable Commutation DMA request */ 01837 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM); 01838 01839 /* Enable the Commutation Interrupt */ 01840 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); 01841 01842 __HAL_UNLOCK(htim); 01843 01844 return HAL_OK; 01845 } 01846 01847 /** 01848 * @brief Configure the TIM commutation event sequence with DMA. 01849 * @note This function is mandatory to use the commutation event in order to 01850 * update the configuration at each commutation detection on the TRGI input of the Timer, 01851 * the typical use of this feature is with the use of another Timer(interface Timer) 01852 * configured in Hall sensor interface, this interface Timer will generate the 01853 * commutation at its TRGO output (connected to Timer used in this function) each time 01854 * the TI1 of the Interface Timer detect a commutation at its input TI1. 01855 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set 01856 * @param htim TIM handle 01857 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor 01858 * This parameter can be one of the following values: 01859 * @arg TIM_TS_ITR0: Internal trigger 0 selected 01860 * @arg TIM_TS_ITR1: Internal trigger 1 selected 01861 * @arg TIM_TS_ITR2: Internal trigger 2 selected 01862 * @arg TIM_TS_ITR3: Internal trigger 3 selected 01863 * @arg TIM_TS_NONE: No trigger is needed 01864 * @param CommutationSource the Commutation Event source 01865 * This parameter can be one of the following values: 01866 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer 01867 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit 01868 * @retval HAL status 01869 */ 01870 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 01871 uint32_t CommutationSource) 01872 { 01873 /* Check the parameters */ 01874 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); 01875 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); 01876 01877 __HAL_LOCK(htim); 01878 01879 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || 01880 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) 01881 { 01882 /* Select the Input trigger */ 01883 htim->Instance->SMCR &= ~TIM_SMCR_TS; 01884 htim->Instance->SMCR |= InputTrigger; 01885 } 01886 01887 /* Select the Capture Compare preload feature */ 01888 htim->Instance->CR2 |= TIM_CR2_CCPC; 01889 /* Select the Commutation event source */ 01890 htim->Instance->CR2 &= ~TIM_CR2_CCUS; 01891 htim->Instance->CR2 |= CommutationSource; 01892 01893 /* Enable the Commutation DMA Request */ 01894 /* Set the DMA Commutation Callback */ 01895 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; 01896 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt; 01897 /* Set the DMA error callback */ 01898 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; 01899 01900 /* Disable Commutation Interrupt */ 01901 __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM); 01902 01903 /* Enable the Commutation DMA Request */ 01904 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); 01905 01906 __HAL_UNLOCK(htim); 01907 01908 return HAL_OK; 01909 } 01910 01911 /** 01912 * @brief Configures the TIM in master mode. 01913 * @param htim TIM handle. 01914 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that 01915 * contains the selected trigger output (TRGO) and the Master/Slave 01916 * mode. 01917 * @retval HAL status 01918 */ 01919 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 01920 TIM_MasterConfigTypeDef *sMasterConfig) 01921 { 01922 uint32_t tmpcr2; 01923 uint32_t tmpsmcr; 01924 01925 /* Check the parameters */ 01926 assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); 01927 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); 01928 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); 01929 01930 /* Check input state */ 01931 __HAL_LOCK(htim); 01932 01933 /* Change the handler state */ 01934 htim->State = HAL_TIM_STATE_BUSY; 01935 01936 /* Get the TIMx CR2 register value */ 01937 tmpcr2 = htim->Instance->CR2; 01938 01939 /* Get the TIMx SMCR register value */ 01940 tmpsmcr = htim->Instance->SMCR; 01941 01942 /* Reset the MMS Bits */ 01943 tmpcr2 &= ~TIM_CR2_MMS; 01944 /* Select the TRGO source */ 01945 tmpcr2 |= sMasterConfig->MasterOutputTrigger; 01946 01947 /* Update TIMx CR2 */ 01948 htim->Instance->CR2 = tmpcr2; 01949 01950 if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 01951 { 01952 /* Reset the MSM Bit */ 01953 tmpsmcr &= ~TIM_SMCR_MSM; 01954 /* Set master mode */ 01955 tmpsmcr |= sMasterConfig->MasterSlaveMode; 01956 01957 /* Update TIMx SMCR */ 01958 htim->Instance->SMCR = tmpsmcr; 01959 } 01960 01961 /* Change the htim state */ 01962 htim->State = HAL_TIM_STATE_READY; 01963 01964 __HAL_UNLOCK(htim); 01965 01966 return HAL_OK; 01967 } 01968 01969 /** 01970 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State 01971 * and the AOE(automatic output enable). 01972 * @param htim TIM handle 01973 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that 01974 * contains the BDTR Register configuration information for the TIM peripheral. 01975 * @note Interrupts can be generated when an active level is detected on the 01976 * break input, the break 2 input or the system break input. Break 01977 * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro. 01978 * @retval HAL status 01979 */ 01980 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 01981 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig) 01982 { 01983 /* Keep this variable initialized to 0 as it is used to configure BDTR register */ 01984 uint32_t tmpbdtr = 0U; 01985 01986 /* Check the parameters */ 01987 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); 01988 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); 01989 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); 01990 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); 01991 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); 01992 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); 01993 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); 01994 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); 01995 01996 /* Check input state */ 01997 __HAL_LOCK(htim); 01998 01999 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, 02000 the OSSI State, the dead time value and the Automatic Output Enable Bit */ 02001 02002 /* Set the BDTR bits */ 02003 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime); 02004 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel); 02005 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode); 02006 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode); 02007 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState); 02008 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity); 02009 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput); 02010 02011 02012 /* Set TIMx_BDTR */ 02013 htim->Instance->BDTR = tmpbdtr; 02014 02015 __HAL_UNLOCK(htim); 02016 02017 return HAL_OK; 02018 } 02019 02020 /** 02021 * @brief Configures the TIMx Remapping input capabilities. 02022 * @param htim TIM handle. 02023 * @param Remap specifies the TIM remapping source. 02024 * 02025 * @retval HAL status 02026 */ 02027 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) 02028 { 02029 /* Prevent unused argument(s) compilation warning */ 02030 UNUSED(htim); 02031 UNUSED(Remap); 02032 02033 return HAL_OK; 02034 } 02035 02036 /** 02037 * @} 02038 */ 02039 02040 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 02041 * @brief Extended Callbacks functions 02042 * 02043 @verbatim 02044 ============================================================================== 02045 ##### Extended Callbacks functions ##### 02046 ============================================================================== 02047 [..] 02048 This section provides Extended TIM callback functions: 02049 (+) Timer Commutation callback 02050 (+) Timer Break callback 02051 02052 @endverbatim 02053 * @{ 02054 */ 02055 02056 /** 02057 * @brief Hall commutation changed callback in non-blocking mode 02058 * @param htim TIM handle 02059 * @retval None 02060 */ 02061 __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) 02062 { 02063 /* Prevent unused argument(s) compilation warning */ 02064 UNUSED(htim); 02065 02066 /* NOTE : This function should not be modified, when the callback is needed, 02067 the HAL_TIMEx_CommutCallback could be implemented in the user file 02068 */ 02069 } 02070 /** 02071 * @brief Hall commutation changed half complete callback in non-blocking mode 02072 * @param htim TIM handle 02073 * @retval None 02074 */ 02075 __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim) 02076 { 02077 /* Prevent unused argument(s) compilation warning */ 02078 UNUSED(htim); 02079 02080 /* NOTE : This function should not be modified, when the callback is needed, 02081 the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file 02082 */ 02083 } 02084 02085 /** 02086 * @brief Hall Break detection callback in non-blocking mode 02087 * @param htim TIM handle 02088 * @retval None 02089 */ 02090 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) 02091 { 02092 /* Prevent unused argument(s) compilation warning */ 02093 UNUSED(htim); 02094 02095 /* NOTE : This function should not be modified, when the callback is needed, 02096 the HAL_TIMEx_BreakCallback could be implemented in the user file 02097 */ 02098 } 02099 /** 02100 * @} 02101 */ 02102 02103 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 02104 * @brief Extended Peripheral State functions 02105 * 02106 @verbatim 02107 ============================================================================== 02108 ##### Extended Peripheral State functions ##### 02109 ============================================================================== 02110 [..] 02111 This subsection permits to get in run-time the status of the peripheral 02112 and the data flow. 02113 02114 @endverbatim 02115 * @{ 02116 */ 02117 02118 /** 02119 * @brief Return the TIM Hall Sensor interface handle state. 02120 * @param htim TIM Hall Sensor handle 02121 * @retval HAL state 02122 */ 02123 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) 02124 { 02125 return htim->State; 02126 } 02127 02128 /** 02129 * @brief Return actual state of the TIM complementary channel. 02130 * @param htim TIM handle 02131 * @param ChannelN TIM Complementary channel 02132 * This parameter can be one of the following values: 02133 * @arg TIM_CHANNEL_1: TIM Channel 1 02134 * @arg TIM_CHANNEL_2: TIM Channel 2 02135 * @arg TIM_CHANNEL_3: TIM Channel 3 02136 * @retval TIM Complementary channel state 02137 */ 02138 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN) 02139 { 02140 HAL_TIM_ChannelStateTypeDef channel_state; 02141 02142 /* Check the parameters */ 02143 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN)); 02144 02145 channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN); 02146 02147 return channel_state; 02148 } 02149 /** 02150 * @} 02151 */ 02152 02153 /** 02154 * @} 02155 */ 02156 02157 /* Private functions ---------------------------------------------------------*/ 02158 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions 02159 * @{ 02160 */ 02161 02162 /** 02163 * @brief TIM DMA Commutation callback. 02164 * @param hdma pointer to DMA handle. 02165 * @retval None 02166 */ 02167 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) 02168 { 02169 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 02170 02171 /* Change the htim state */ 02172 htim->State = HAL_TIM_STATE_READY; 02173 02174 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) 02175 htim->CommutationCallback(htim); 02176 #else 02177 HAL_TIMEx_CommutCallback(htim); 02178 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 02179 } 02180 02181 /** 02182 * @brief TIM DMA Commutation half complete callback. 02183 * @param hdma pointer to DMA handle. 02184 * @retval None 02185 */ 02186 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma) 02187 { 02188 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 02189 02190 /* Change the htim state */ 02191 htim->State = HAL_TIM_STATE_READY; 02192 02193 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) 02194 htim->CommutationHalfCpltCallback(htim); 02195 #else 02196 HAL_TIMEx_CommutHalfCpltCallback(htim); 02197 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 02198 } 02199 02200 02201 /** 02202 * @brief TIM DMA Delay Pulse complete callback (complementary channel). 02203 * @param hdma pointer to DMA handle. 02204 * @retval None 02205 */ 02206 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma) 02207 { 02208 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 02209 02210 if (hdma == htim->hdma[TIM_DMA_ID_CC1]) 02211 { 02212 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 02213 02214 if (hdma->Init.Mode == DMA_NORMAL) 02215 { 02216 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 02217 } 02218 } 02219 else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) 02220 { 02221 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 02222 02223 if (hdma->Init.Mode == DMA_NORMAL) 02224 { 02225 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 02226 } 02227 } 02228 else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) 02229 { 02230 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 02231 02232 if (hdma->Init.Mode == DMA_NORMAL) 02233 { 02234 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); 02235 } 02236 } 02237 else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) 02238 { 02239 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 02240 02241 if (hdma->Init.Mode == DMA_NORMAL) 02242 { 02243 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_4, HAL_TIM_CHANNEL_STATE_READY); 02244 } 02245 } 02246 else 02247 { 02248 /* nothing to do */ 02249 } 02250 02251 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) 02252 htim->PWM_PulseFinishedCallback(htim); 02253 #else 02254 HAL_TIM_PWM_PulseFinishedCallback(htim); 02255 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 02256 02257 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 02258 } 02259 02260 /** 02261 * @brief TIM DMA error callback (complementary channel) 02262 * @param hdma pointer to DMA handle. 02263 * @retval None 02264 */ 02265 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma) 02266 { 02267 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 02268 02269 if (hdma == htim->hdma[TIM_DMA_ID_CC1]) 02270 { 02271 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 02272 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 02273 } 02274 else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) 02275 { 02276 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 02277 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 02278 } 02279 else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) 02280 { 02281 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 02282 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY); 02283 } 02284 else 02285 { 02286 /* nothing to do */ 02287 } 02288 02289 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) 02290 htim->ErrorCallback(htim); 02291 #else 02292 HAL_TIM_ErrorCallback(htim); 02293 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ 02294 02295 htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 02296 } 02297 02298 /** 02299 * @brief Enables or disables the TIM Capture Compare Channel xN. 02300 * @param TIMx to select the TIM peripheral 02301 * @param Channel specifies the TIM Channel 02302 * This parameter can be one of the following values: 02303 * @arg TIM_CHANNEL_1: TIM Channel 1 02304 * @arg TIM_CHANNEL_2: TIM Channel 2 02305 * @arg TIM_CHANNEL_3: TIM Channel 3 02306 * @param ChannelNState specifies the TIM Channel CCxNE bit new state. 02307 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. 02308 * @retval None 02309 */ 02310 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState) 02311 { 02312 uint32_t tmp; 02313 02314 tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ 02315 02316 /* Reset the CCxNE Bit */ 02317 TIMx->CCER &= ~tmp; 02318 02319 /* Set or reset the CCxNE Bit */ 02320 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */ 02321 } 02322 /** 02323 * @} 02324 */ 02325 02326 #endif /* HAL_TIM_MODULE_ENABLED */ 02327 /** 02328 * @} 02329 */ 02330 02331 /** 02332 * @} 02333 */ 02334 02335 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/