STM32F479xx HAL User Manual
Defines
DAC Private Constants
DAC

Defines

#define DAC_CR_CH1_BITOFFSET
#define DAC_CR_CH2_BITOFFSET
#define DAC_CR_CHX_BITOFFSET_MASK   (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET)
#define DAC_SWTR_CH1   (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. */
#define DAC_SWTR_CH2   (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. */
#define DAC_SWTR_CHX_MASK   (DAC_SWTR_CH1 | DAC_SWTR_CH2)
#define DAC_REG_DHR12R1_REGOFFSET   0x00000000UL /* Register DHR12Rx channel 1 taken as reference */
#define DAC_REG_DHR12L1_REGOFFSET
#define DAC_REG_DHR8R1_REGOFFSET
#define DAC_REG_DHR12R2_REGOFFSET
#define DAC_REG_DHR12L2_REGOFFSET
#define DAC_REG_DHR8R2_REGOFFSET
#define DAC_REG_DHR12RX_REGOFFSET_MASK   0x000F0000UL
#define DAC_REG_DHR12LX_REGOFFSET_MASK   0x00F00000UL
#define DAC_REG_DHR8RX_REGOFFSET_MASK   0x0F000000UL
#define DAC_REG_DHRX_REGOFFSET_MASK
#define DAC_REG_DOR1_REGOFFSET   0x00000000UL /* Register DORx channel 1 taken as reference */
#define DAC_REG_DOR2_REGOFFSET
#define DAC_REG_DORX_REGOFFSET_MASK   (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET)
#define DAC_REG_DHR_REGOFFSET_MASK_POSBIT0
#define DAC_REG_DORX_REGOFFSET_MASK_POSBIT0
#define DAC_REG_SHSRX_REGOFFSET_MASK_POSBIT0
#define DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS
#define DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS
#define DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS
#define DAC_REG_DORX_REGOFFSET_BITOFFSET_POS
#define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS   DAC_DHR12RD_DACC2DHR_Pos
#define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS   DAC_DHR12LD_DACC2DHR_Pos
#define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS   DAC_DHR8RD_DACC2DHR_Pos
#define DAC_DIGITAL_SCALE_12BITS

Define Documentation

#define DAC_CR_CH1_BITOFFSET
Value:
0UL   /* Position of channel bits into registers
                                                CR, MCR, CCR, SHHR, SHRR of channel 1 */

Definition at line 55 of file stm32f4xx_ll_dac.h.

#define DAC_CR_CH2_BITOFFSET
Value:
16UL  /* Position of channel bits into registers
                                                CR, MCR, CCR, SHHR, SHRR of channel 2 */

Definition at line 57 of file stm32f4xx_ll_dac.h.

#define DAC_CR_CHX_BITOFFSET_MASK   (DAC_CR_CH1_BITOFFSET | DAC_CR_CH2_BITOFFSET)

Definition at line 58 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_Disable(), LL_DAC_DisableDMAReq(), LL_DAC_DisableTrigger(), LL_DAC_GetOutputBuffer(), LL_DAC_GetTriggerSource(), LL_DAC_GetWaveNoiseLFSR(), LL_DAC_Init(), LL_DAC_IsDMAReqEnabled(), LL_DAC_IsEnabled(), LL_DAC_IsTriggerEnabled(), LL_DAC_SetTriggerSource(), LL_DAC_SetWaveNoiseLFSR(), and LL_DAC_SetWaveTriangleAmplitude().

#define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS   DAC_DHR12LD_DACC2DHR_Pos

Definition at line 105 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_ConvertDualData8RightAligned().

#define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS   DAC_DHR12RD_DACC2DHR_Pos

Definition at line 104 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_ConvertDualData12LeftAligned().

#define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS   DAC_DHR8RD_DACC2DHR_Pos

Definition at line 106 of file stm32f4xx_ll_dac.h.

#define DAC_DIGITAL_SCALE_12BITS
Value:
4095UL   /* Full-scale digital value with a resolution of 12
                                                              bits (voltage range determined by analog voltage
                                                              references Vref+ and Vref-, refer to reference manual) */

Definition at line 109 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12L1_REGOFFSET
Value:
0x00100000UL            /* Register offset of DHR12Lx channel 1 versus
                                                                  DHR12Rx channel 1 (shifted left of 20 bits)   */

Definition at line 72 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12L2_REGOFFSET
Value:
0x00400000UL            /* Register offset of DHR12Lx channel 2 versus
                                                                  DHR12Rx channel 1 (shifted left of 20 bits)   */

Definition at line 76 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12LX_REGOFFSET_BITOFFSET_POS
Value:
20UL  /* Position of bits register offset of DHR12Lx
                                                                   channel 1 or 2 versus DHR12Rx channel 1
                                                                   (shifted left of 20 bits)                   */

Definition at line 97 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12LX_REGOFFSET_MASK   0x00F00000UL

Definition at line 80 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12R1_REGOFFSET   0x00000000UL /* Register DHR12Rx channel 1 taken as reference */

Definition at line 71 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12R2_REGOFFSET
Value:
0x00030000UL            /* Register offset of DHR12Rx channel 2 versus
                                                                  DHR12Rx channel 1 (shifted left of 16 bits)   */

Definition at line 75 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12RX_REGOFFSET_BITOFFSET_POS
Value:
16UL  /* Position of bits register offset of DHR12Rx
                                                                   channel 1 or 2 versus DHR12Rx channel 1
                                                                   (shifted left of 16 bits)                   */

Definition at line 96 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR12RX_REGOFFSET_MASK   0x000F0000UL

Definition at line 79 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR8R1_REGOFFSET
Value:
0x02000000UL            /* Register offset of DHR8Rx  channel 1 versus
                                                                  DHR12Rx channel 1 (shifted left of 24 bits)   */

Definition at line 73 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR8R2_REGOFFSET
Value:
0x05000000UL            /* Register offset of DHR8Rx  channel 2 versus
                                                                  DHR12Rx channel 1 (shifted left of 24 bits)   */

Definition at line 77 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR8RX_REGOFFSET_BITOFFSET_POS
Value:
24UL  /* Position of bits register offset of DHR8Rx
                                                                   channel 1 or 2 versus DHR12Rx channel 1
                                                                   (shifted left of 24 bits)                   */

Definition at line 98 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_ConvertDualData12RightAligned().

#define DAC_REG_DHR8RX_REGOFFSET_MASK   0x0F000000UL

Definition at line 81 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DHR_REGOFFSET_MASK_POSBIT0
Value:
0x0000000FUL /* Mask of data hold registers offset (DHR12Rx,
                                                                   DHR12Lx, DHR8Rx, ...) when shifted to position 0 */

Definition at line 92 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_ConvertDualData12RightAligned(), and LL_DAC_DMA_GetRegAddr().

#define DAC_REG_DHRX_REGOFFSET_MASK
Value:
(DAC_REG_DHR12RX_REGOFFSET_MASK\
                                        | DAC_REG_DHR12LX_REGOFFSET_MASK | DAC_REG_DHR8RX_REGOFFSET_MASK)

Definition at line 82 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DOR1_REGOFFSET   0x00000000UL /* Register DORx channel 1 taken as reference */

Definition at line 85 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DOR2_REGOFFSET
Value:
0x10000000UL            /* Register offset of DORx channel 1 versus
                                                                  DORx channel 2 (shifted left of 28 bits)   */

Definition at line 87 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DORX_REGOFFSET_BITOFFSET_POS
Value:
28UL  /* Position of bits register offset of DORx
                                                                   channel 1 or 2 versus DORx channel 1
                                                                   (shifted left of 28 bits)                   */

Definition at line 99 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_IsActiveFlag_DMAUDR1().

#define DAC_REG_DORX_REGOFFSET_MASK   (DAC_REG_DOR1_REGOFFSET | DAC_REG_DOR2_REGOFFSET)

Definition at line 88 of file stm32f4xx_ll_dac.h.

#define DAC_REG_DORX_REGOFFSET_MASK_POSBIT0
Value:
0x00000001UL /* Mask of DORx registers offset when shifted
                                                                   to position 0                                    */

Definition at line 93 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_IsActiveFlag_DMAUDR1().

#define DAC_REG_SHSRX_REGOFFSET_MASK_POSBIT0
Value:
0x00000001UL /* Mask of SHSRx registers offset when shifted
                                                                   to position 0                                    */

Definition at line 94 of file stm32f4xx_ll_dac.h.

#define DAC_SWTR_CH1   (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. */

Definition at line 63 of file stm32f4xx_ll_dac.h.

#define DAC_SWTR_CH2   (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. */

Definition at line 65 of file stm32f4xx_ll_dac.h.

#define DAC_SWTR_CHX_MASK   (DAC_SWTR_CH1 | DAC_SWTR_CH2)

Definition at line 66 of file stm32f4xx_ll_dac.h.

Referenced by LL_DAC_ConvertData12RightAligned().

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