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STM32F479xx HAL User Manual
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Defines | |
| #define | ETH_REG_WRITE_DELAY 0x00000001U |
| #define | ETH_SUCCESS 0U |
| #define | ETH_ERROR 1U |
| #define | ETH_DMATXDESC_COLLISION_COUNTSHIFT 3U |
| #define | ETH_DMATXDESC_BUFFER2_SIZESHIFT 16U |
| #define | ETH_DMARXDESC_FRAME_LENGTHSHIFT 16U |
| #define | ETH_DMARXDESC_BUFFER2_SIZESHIFT 16U |
| #define | ETH_DMARXDESC_FRAMELENGTHSHIFT 16U |
| #define | ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + 0x40U) /* ETHERNET MAC address high offset */ |
| #define | ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + 0x44U) /* ETHERNET MAC address low offset */ |
| #define | ETH_MACMIIAR_CR_MASK 0xFFFFFFE3U |
| #define | ETH_MACCR_CLEAR_MASK 0xFF20810FU |
| #define | ETH_MACFCR_CLEAR_MASK 0x0000FF41U |
| #define | ETH_DMAOMR_CLEAR_MASK 0xF8DE3F23U |
| #define | ETH_WAKEUP_REGISTER_LENGTH 8U |
| #define | ETH_DMA_RX_OVERFLOW_MISSEDFRAMES_COUNTERSHIFT 17U |
| #define ETH_DMA_RX_OVERFLOW_MISSEDFRAMES_COUNTERSHIFT 17U |
Definition at line 340 of file stm32f4xx_hal_eth.h.
| #define ETH_DMAOMR_CLEAR_MASK 0xF8DE3F23U |
Definition at line 334 of file stm32f4xx_hal_eth.h.
Referenced by ETH_MACDMAConfig(), and HAL_ETH_ConfigDMA().
| #define ETH_DMARXDESC_BUFFER2_SIZESHIFT 16U |
Definition at line 315 of file stm32f4xx_hal_eth.h.
| #define ETH_DMARXDESC_FRAME_LENGTHSHIFT 16U |
Definition at line 312 of file stm32f4xx_hal_eth.h.
| #define ETH_DMARXDESC_FRAMELENGTHSHIFT 16U |
Definition at line 318 of file stm32f4xx_hal_eth.h.
Referenced by HAL_ETH_GetReceivedFrame(), and HAL_ETH_GetReceivedFrame_IT().
| #define ETH_DMATXDESC_BUFFER2_SIZESHIFT 16U |
Definition at line 309 of file stm32f4xx_hal_eth.h.
| #define ETH_DMATXDESC_COLLISION_COUNTSHIFT 3U |
Definition at line 306 of file stm32f4xx_hal_eth.h.
| #define ETH_ERROR 1U |
Definition at line 303 of file stm32f4xx_hal_eth.h.
Referenced by HAL_ETH_Init().
| #define ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + 0x40U) /* ETHERNET MAC address high offset */ |
Definition at line 321 of file stm32f4xx_hal_eth.h.
Referenced by ETH_MACAddressConfig().
| #define ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + 0x44U) /* ETHERNET MAC address low offset */ |
Definition at line 322 of file stm32f4xx_hal_eth.h.
Referenced by ETH_MACAddressConfig().
| #define ETH_MACCR_CLEAR_MASK 0xFF20810FU |
Definition at line 328 of file stm32f4xx_hal_eth.h.
Referenced by ETH_MACDMAConfig(), and HAL_ETH_ConfigMAC().
| #define ETH_MACFCR_CLEAR_MASK 0x0000FF41U |
Definition at line 331 of file stm32f4xx_hal_eth.h.
Referenced by ETH_MACDMAConfig(), and HAL_ETH_ConfigMAC().
| #define ETH_MACMIIAR_CR_MASK 0xFFFFFFE3U |
Definition at line 325 of file stm32f4xx_hal_eth.h.
Referenced by HAL_ETH_Init(), HAL_ETH_ReadPHYRegister(), and HAL_ETH_WritePHYRegister().
| #define ETH_REG_WRITE_DELAY 0x00000001U |
Definition at line 299 of file stm32f4xx_hal_eth.h.
Referenced by ETH_FlushTransmitFIFO(), ETH_MACDMAConfig(), ETH_MACReceptionDisable(), ETH_MACReceptionEnable(), ETH_MACTransmissionDisable(), ETH_MACTransmissionEnable(), HAL_ETH_ConfigDMA(), and HAL_ETH_ConfigMAC().
| #define ETH_SUCCESS 0U |
Definition at line 302 of file stm32f4xx_hal_eth.h.
Referenced by ETH_MACDMAConfig(), and HAL_ETH_Init().
| #define ETH_WAKEUP_REGISTER_LENGTH 8U |
Definition at line 337 of file stm32f4xx_hal_eth.h.
1.7.6.1