Defines
#define	LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE_5 (0x00000000UL)
#define	LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES_5 ( ADC_CCR_DELAY_0)
#define	LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES_5 ( ADC_CCR_DELAY_1 )
#define	LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5 ( ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)
#define	LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5_8_BITS ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)
#define	LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5 ( ADC_CCR_DELAY_2 )
#define	LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5_10_BITS ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)
#define	LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (ADC_CCR_DELAY_3 )
#define	LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5 ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_0)
#define	LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5_12_BITS ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)
#define	LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES_5 ( ADC_CCR_DELAY_2 \| ADC_CCR_DELAY_1 \| ADC_CCR_DELAY_0)
#define	LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (ADC_CCR_DELAY_3 )
#define	LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3 )

Define Documentation

ADC multimode delay between two sampling phases: 1.5 ADC clock cycle for all resolution

Definition at line 1462 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_2CYCLES_5 ( ADC_CCR_DELAY_0)

ADC multimode delay between two sampling phases: 2.5 ADC clock cycles for all resolution

Definition at line 1463 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_3CYCLES_5 ( ADC_CCR_DELAY_1 )

ADC multimode delay between two sampling phases: 3.5 ADC clock cycles for all resolution

Definition at line 1464 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5 ( ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)

ADC multimode delay between two sampling phases: 4.5 ADC clock cycles for 16, 14, 12 or 10 bits resolution

Definition at line 1465 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_4CYCLES_5_8_BITS ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)

ADC multimode delay between two sampling phases: 4.5 ADC clock cycles for 8 bits resolution

Definition at line 1466 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5 ( ADC_CCR_DELAY_2 )

ADC multimode delay between two sampling phases: 5.5 ADC clock cycles for 16, 14, 12 bits resolution

Definition at line 1467 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_5CYCLES_5_10_BITS ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)

ADC multimode delay between two sampling phases: 5.5 ADC clock cycles for 10 bits resolution

Definition at line 1468 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES (ADC_CCR_DELAY_3 )

ADC multimode delay between two sampling phases: 6 ADC clock cycles for 10 or 8 bits resolution

Definition at line 1469 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5 ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0)

ADC multimode delay between two sampling phases: 6.5 ADC clock cycles for 16 or 14 bits resolution

Definition at line 1470 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_6CYCLES_5_12_BITS ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)

ADC multimode delay between two sampling phases: 6.5 ADC clock cycles for 12 bits resolution

Definition at line 1471 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_7CYCLES_5 ( ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)

ADC multimode delay between two sampling phases: 7.5 ADC clock cycles for 16 bits resolution

Definition at line 1472 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_8CYCLES (ADC_CCR_DELAY_3 )

ADC multimode delay between two sampling phases: 8 ADC clock cycles for 12 bits resolution

Definition at line 1473 of file stm32h7xx_ll_adc.h.

#define LL_ADC_MULTI_TWOSMP_DELAY_9CYCLES (ADC_CCR_DELAY_3 )

ADC multimode delay between two sampling phases: 9 ADC clock cycles for 16 or 14 bits resolution

Definition at line 1474 of file stm32h7xx_ll_adc.h.

Defines