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STM32H735xx HAL User Manual
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Defines | |
| #define | LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000UL) |
| #define | LL_ADC_REG_SEQ_DISCONT_1RANK ( ADC_CFGR_DISCEN) |
| #define | LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
| #define | LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCEN) |
| #define | LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
| #define | LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCEN) |
| #define | LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
| #define | LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCEN) |
| #define | LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
| #define LL_ADC_REG_SEQ_DISCONT_1RANK ( ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enable with sequence interruption every rank
Definition at line 1088 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_2RANKS ( ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enabled with sequence interruption every 2 ranks
Definition at line 1089 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_3RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enable with sequence interruption every 3 ranks
Definition at line 1090 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_4RANKS ( ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enable with sequence interruption every 4 ranks
Definition at line 1091 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_5RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enable with sequence interruption every 5 ranks
Definition at line 1092 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_6RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enable with sequence interruption every 6 ranks
Definition at line 1093 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_7RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enable with sequence interruption every 7 ranks
Definition at line 1094 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_8RANKS (ADC_CFGR_DISCNUM_2 | ADC_CFGR_DISCNUM_1 | ADC_CFGR_DISCNUM_0 | ADC_CFGR_DISCEN) |
ADC group regular sequencer discontinuous mode enable with sequence interruption every 8 ranks
Definition at line 1095 of file stm32h7xx_ll_adc.h.
| #define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000UL) |
ADC group regular sequencer discontinuous mode disable
Definition at line 1087 of file stm32h7xx_ll_adc.h.
Referenced by LL_ADC_INJ_Init(), LL_ADC_REG_Init(), and LL_ADC_REG_StructInit().
1.7.6.1