IT_Management

Functions
__STATIC_INLINE void	LL_HSEM_EnableIT_C1IER (HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)
	Enable interrupt.
__STATIC_INLINE void	LL_HSEM_DisableIT_C1IER (HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)
	Disable interrupt.
__STATIC_INLINE uint32_t	LL_HSEM_IsEnabledIT_C1IER (HSEM_TypeDef *HSEMx, uint32_t SemaphoreMask)
	Check if interrupt is enabled.

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Function Documentation

__STATIC_INLINE void LL_HSEM_DisableIT_C1IER	(	HSEM_TypeDef *	HSEMx,
		uint32_t	SemaphoreMask
	)

Disable interrupt.

Reference Manual to LL API cross reference:

C1IER ISEM LL_HSEM_DisableIT_C1IER

Parameters:

HSEMx

HSEM Instance.

SemaphoreMask

This parameter can be a combination of the following values: LL_HSEM_SEMAPHORE_0 LL_HSEM_SEMAPHORE_1 LL_HSEM_SEMAPHORE_2 LL_HSEM_SEMAPHORE_3 LL_HSEM_SEMAPHORE_4 LL_HSEM_SEMAPHORE_5 LL_HSEM_SEMAPHORE_6 LL_HSEM_SEMAPHORE_7 LL_HSEM_SEMAPHORE_8 LL_HSEM_SEMAPHORE_9 LL_HSEM_SEMAPHORE_10 LL_HSEM_SEMAPHORE_11 LL_HSEM_SEMAPHORE_12 LL_HSEM_SEMAPHORE_13 LL_HSEM_SEMAPHORE_14 LL_HSEM_SEMAPHORE_15 LL_HSEM_SEMAPHORE_16 LL_HSEM_SEMAPHORE_17 LL_HSEM_SEMAPHORE_18 LL_HSEM_SEMAPHORE_19 LL_HSEM_SEMAPHORE_20 LL_HSEM_SEMAPHORE_21 LL_HSEM_SEMAPHORE_22 LL_HSEM_SEMAPHORE_23 LL_HSEM_SEMAPHORE_24 LL_HSEM_SEMAPHORE_25 LL_HSEM_SEMAPHORE_26 LL_HSEM_SEMAPHORE_27 LL_HSEM_SEMAPHORE_28 LL_HSEM_SEMAPHORE_29 LL_HSEM_SEMAPHORE_30 LL_HSEM_SEMAPHORE_31 LL_HSEM_SEMAPHORE_ALL

Note:

Availability of flags LL_HSEM_SEMAPHORE_16 to LL_HSEM_SEMAPHORE_31 depends on devices.

Return values:

None

Definition at line 406 of file stm32h7xx_ll_hsem.h.

__STATIC_INLINE void LL_HSEM_EnableIT_C1IER	(	HSEM_TypeDef *	HSEMx,
		uint32_t	SemaphoreMask
	)

Enable interrupt.

Reference Manual to LL API cross reference:

C1IER ISEM LL_HSEM_EnableIT_C1IER

Parameters:

HSEMx

HSEM Instance.

SemaphoreMask

This parameter can be a combination of the following values: LL_HSEM_SEMAPHORE_0 LL_HSEM_SEMAPHORE_1 LL_HSEM_SEMAPHORE_2 LL_HSEM_SEMAPHORE_3 LL_HSEM_SEMAPHORE_4 LL_HSEM_SEMAPHORE_5 LL_HSEM_SEMAPHORE_6 LL_HSEM_SEMAPHORE_7 LL_HSEM_SEMAPHORE_8 LL_HSEM_SEMAPHORE_9 LL_HSEM_SEMAPHORE_10 LL_HSEM_SEMAPHORE_11 LL_HSEM_SEMAPHORE_12 LL_HSEM_SEMAPHORE_13 LL_HSEM_SEMAPHORE_14 LL_HSEM_SEMAPHORE_15 LL_HSEM_SEMAPHORE_16 LL_HSEM_SEMAPHORE_17 LL_HSEM_SEMAPHORE_18 LL_HSEM_SEMAPHORE_19 LL_HSEM_SEMAPHORE_20 LL_HSEM_SEMAPHORE_21 LL_HSEM_SEMAPHORE_22 LL_HSEM_SEMAPHORE_23 LL_HSEM_SEMAPHORE_24 LL_HSEM_SEMAPHORE_25 LL_HSEM_SEMAPHORE_26 LL_HSEM_SEMAPHORE_27 LL_HSEM_SEMAPHORE_28 LL_HSEM_SEMAPHORE_29 LL_HSEM_SEMAPHORE_30 LL_HSEM_SEMAPHORE_31 LL_HSEM_SEMAPHORE_ALL

Note:

Availability of flags LL_HSEM_SEMAPHORE_16 to LL_HSEM_SEMAPHORE_31 depends on devices.

Return values:

None

Definition at line 359 of file stm32h7xx_ll_hsem.h.

__STATIC_INLINE uint32_t LL_HSEM_IsEnabledIT_C1IER	(	HSEM_TypeDef *	HSEMx,
		uint32_t	SemaphoreMask
	)

Check if interrupt is enabled.

Reference Manual to LL API cross reference:

C1IER ISEM LL_HSEM_IsEnabledIT_C1IER

Parameters:

HSEMx

HSEM Instance.

SemaphoreMask

This parameter can be a combination of the following values: LL_HSEM_SEMAPHORE_0 LL_HSEM_SEMAPHORE_1 LL_HSEM_SEMAPHORE_2 LL_HSEM_SEMAPHORE_3 LL_HSEM_SEMAPHORE_4 LL_HSEM_SEMAPHORE_5 LL_HSEM_SEMAPHORE_6 LL_HSEM_SEMAPHORE_7 LL_HSEM_SEMAPHORE_8 LL_HSEM_SEMAPHORE_9 LL_HSEM_SEMAPHORE_10 LL_HSEM_SEMAPHORE_11 LL_HSEM_SEMAPHORE_12 LL_HSEM_SEMAPHORE_13 LL_HSEM_SEMAPHORE_14 LL_HSEM_SEMAPHORE_15 LL_HSEM_SEMAPHORE_16 LL_HSEM_SEMAPHORE_17 LL_HSEM_SEMAPHORE_18 LL_HSEM_SEMAPHORE_19 LL_HSEM_SEMAPHORE_20 LL_HSEM_SEMAPHORE_21 LL_HSEM_SEMAPHORE_22 LL_HSEM_SEMAPHORE_23 LL_HSEM_SEMAPHORE_24 LL_HSEM_SEMAPHORE_25 LL_HSEM_SEMAPHORE_26 LL_HSEM_SEMAPHORE_27 LL_HSEM_SEMAPHORE_28 LL_HSEM_SEMAPHORE_29 LL_HSEM_SEMAPHORE_30 LL_HSEM_SEMAPHORE_31 LL_HSEM_SEMAPHORE_ALL

Note:

Availability of flags LL_HSEM_SEMAPHORE_16 to LL_HSEM_SEMAPHORE_31 depends on devices.

Return values:

State

of bit (1 or 0).

Definition at line 453 of file stm32h7xx_ll_hsem.h.