Value:do { \
if((__STATE__) == RCC_LSE_ON) \
{ \
SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
} \
else if((__STATE__) == RCC_LSE_OFF) \
{ \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
} \
else if((__STATE__) == RCC_LSE_BYPASS) \
{ \
SET_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
SET_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
} \
else \
{ \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON); \
CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEBYP); \
} \
} while(0)
Macro to configure the External Low Speed oscillator (LSE).
- Note:
- Transition LSE Bypass to LSE On and LSE On to LSE Bypass are not supported by this macro. User should request a transition to LSE Off first and then LSE On or LSE Bypass.
-
The external input clock can have a frequency up to 1 MHz and be low swing (analog) or digital(*). A duty cycle close to 50% is recommended.
-
As the LSE is in the Backup domain and write access is denied to this domain after reset, you have to enable write access using HAL_PWR_EnableBkUpAccess() function before to configure the LSE (to be done once after reset).
-
After enabling the LSE (RCC_LSE_ON, RCC_LSE_BYPASS or RCC_LSE_BYPASS_DIGITAL*), the application software should wait on LSERDY flag to be set indicating that LSE clock is stable and can be used to clock the RTC.
-
If the RTC is used, the LSE bypass must not be configured in digital mode but in low swing analog mode (*)
- Parameters:
-
| __STATE__,: | specifies the new state of the LSE. This parameter can be one of the following values:
- RCC_LSE_OFF: turn OFF the LSE oscillator, LSERDY flag goes low after 6 LSE oscillator clock cycles.
- RCC_LSE_ON: turn ON the LSE oscillator.
- RCC_LSE_BYPASS: LSE oscillator bypassed with external clock.
- RCC_LSE_BYPASS_DIGITAL: LSE oscillator bypassed with external digital clock. (*)
(*) Available on some STM32H7 lines only. |
Definition at line 7435 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_OscConfig().
