STM32H735xx HAL User Manual
Defines
Output Configuration Mode
TIM Exported Constants

Defines

#define LL_TIM_OCMODE_FROZEN   0x00000000U
#define LL_TIM_OCMODE_ACTIVE   TIM_CCMR1_OC1M_0
#define LL_TIM_OCMODE_INACTIVE   TIM_CCMR1_OC1M_1
#define LL_TIM_OCMODE_TOGGLE   (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
#define LL_TIM_OCMODE_FORCED_INACTIVE   TIM_CCMR1_OC1M_2
#define LL_TIM_OCMODE_FORCED_ACTIVE   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
#define LL_TIM_OCMODE_PWM1   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
#define LL_TIM_OCMODE_PWM2   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
#define LL_TIM_OCMODE_RETRIG_OPM1   TIM_CCMR1_OC1M_3
#define LL_TIM_OCMODE_RETRIG_OPM2   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
#define LL_TIM_OCMODE_COMBINED_PWM1   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
#define LL_TIM_OCMODE_COMBINED_PWM2   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
#define LL_TIM_OCMODE_ASSYMETRIC_PWM1   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
#define LL_TIM_OCMODE_ASSYMETRIC_PWM2   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)

Define Documentation

#define LL_TIM_OCMODE_ACTIVE   TIM_CCMR1_OC1M_0

OCyREF is forced high on compare match

Definition at line 744 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_ASSYMETRIC_PWM1   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)

Asymmetric PWM mode 1

Definition at line 755 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_ASSYMETRIC_PWM2   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)

Asymmetric PWM mode 2

Definition at line 756 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_COMBINED_PWM1   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)

Combined PWM mode 1

Definition at line 753 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_COMBINED_PWM2   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)

Combined PWM mode 2

Definition at line 754 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_FORCED_ACTIVE   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)

OCyREF is forced high

Definition at line 748 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_FORCED_INACTIVE   TIM_CCMR1_OC1M_2

OCyREF is forced low

Definition at line 747 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_FROZEN   0x00000000U

The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the output channel level

Definition at line 743 of file stm32h7xx_ll_tim.h.

Referenced by LL_TIM_OC_StructInit().

#define LL_TIM_OCMODE_INACTIVE   TIM_CCMR1_OC1M_1

OCyREF is forced low on compare match

Definition at line 745 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_PWM1   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)

In upcounting, channel y is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel y is inactive as long as TIMx_CNT>TIMx_CCRy else active.

Definition at line 749 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_PWM2   (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)

In upcounting, channel y is inactive as long as TIMx_CNT<TIMx_CCRy else active. In downcounting, channel y is active as long as TIMx_CNT>TIMx_CCRy else inactive

Definition at line 750 of file stm32h7xx_ll_tim.h.

Referenced by LL_TIM_HALLSENSOR_Init().

#define LL_TIM_OCMODE_RETRIG_OPM1   TIM_CCMR1_OC1M_3

Retrigerrable OPM mode 1

Definition at line 751 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_RETRIG_OPM2   (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)

Retrigerrable OPM mode 2

Definition at line 752 of file stm32h7xx_ll_tim.h.

#define LL_TIM_OCMODE_TOGGLE   (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)

OCyREF toggles on compare match

Definition at line 746 of file stm32h7xx_ll_tim.h.