STM32H735xx HAL User Manual
Data Fields
LL_UTILS_ClkInitTypeDef Struct Reference

UTILS System, AHB and APB buses clock configuration structure definition. More...

#include <stm32h7xx_ll_utils.h>

Data Fields

uint32_t SYSCLKDivider
uint32_t AHBCLKDivider
uint32_t APB1CLKDivider
uint32_t APB2CLKDivider
uint32_t APB3CLKDivider
uint32_t APB4CLKDivider

Detailed Description

UTILS System, AHB and APB buses clock configuration structure definition.

Definition at line 140 of file stm32h7xx_ll_utils.h.


Field Documentation

The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK). This parameter can be a value of AHB prescaler

This feature can be modified afterwards using unitary function LL_RCC_SetAHBPrescaler().

Definition at line 148 of file stm32h7xx_ll_utils.h.

Referenced by UTILS_EnablePLLAndSwitchSystem().

The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK). This parameter can be a value of APB low-speed prescaler (APB1)

This feature can be modified afterwards using unitary function LL_RCC_SetAPB1Prescaler().

Definition at line 154 of file stm32h7xx_ll_utils.h.

Referenced by UTILS_EnablePLLAndSwitchSystem().

The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK). This parameter can be a value of APB low-speed prescaler (APB2)

This feature can be modified afterwards using unitary function LL_RCC_SetAPB2Prescaler().

Definition at line 160 of file stm32h7xx_ll_utils.h.

Referenced by UTILS_EnablePLLAndSwitchSystem().

The APB2 clock (PCLK3) divider. This clock is derived from the AHB clock (HCLK). This parameter can be a value of APB low-speed prescaler (APB3)

This feature can be modified afterwards using unitary function LL_RCC_SetAPB3Prescaler().

Definition at line 166 of file stm32h7xx_ll_utils.h.

Referenced by UTILS_EnablePLLAndSwitchSystem().

The APB4 clock (PCLK4) divider. This clock is derived from the AHB clock (HCLK). This parameter can be a value of APB low-speed prescaler (APB4)

This feature can be modified afterwards using unitary function LL_RCC_SetAPB4Prescaler().

Definition at line 172 of file stm32h7xx_ll_utils.h.

Referenced by UTILS_EnablePLLAndSwitchSystem().

The System clock (SYSCLK) divider. This clock is derived from the PLL output. This parameter can be a value of System prescaler

This feature can be modified afterwards using unitary function LL_RCC_SetSysPrescaler().

Definition at line 142 of file stm32h7xx_ll_utils.h.

Referenced by UTILS_EnablePLLAndSwitchSystem().


The documentation for this struct was generated from the following file: