STM32H735xx HAL User Manual
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RCC PLL configuration structure definition. More...
#include <stm32h7xx_hal_rcc.h>
Data Fields | |
uint32_t | PLLState |
uint32_t | PLLSource |
uint32_t | PLLM |
uint32_t | PLLN |
uint32_t | PLLP |
uint32_t | PLLQ |
uint32_t | PLLR |
uint32_t | PLLRGE |
uint32_t | PLLVCOSEL |
uint32_t | PLLFRACN |
RCC PLL configuration structure definition.
Definition at line 46 of file stm32h7xx_hal_rcc.h.
uint32_t RCC_PLLInitTypeDef::PLLFRACN |
PLLFRACN: Specifies Fractional Part Of The Multiplication Factor for PLL1 VCO It should be a value between 0 and 8191
Definition at line 76 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLM |
PLLM: Division factor for PLL VCO input clock. This parameter must be a number between Min_Data = 1 and Max_Data = 63
Definition at line 54 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLN |
PLLN: Multiplication factor for PLL VCO output clock. This parameter must be a number between Min_Data = 4 and Max_Data = 512 or between Min_Data = 8 and Max_Data = 420(*) (*) : For stm32h7a3xx and stm32h7b3xx family lines.
Definition at line 57 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLP |
PLLP: Division factor for system clock. This parameter must be a number between Min_Data = 2 and Max_Data = 128 odd division factors are not allowed
Definition at line 62 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLQ |
PLLQ: Division factor for peripheral clocks. This parameter must be a number between Min_Data = 1 and Max_Data = 128
Definition at line 66 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLR |
PLLR: Division factor for peripheral clocks. This parameter must be a number between Min_Data = 1 and Max_Data = 128
Definition at line 69 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLRGE |
PLLRGE: PLL1 clock Input range This parameter must be a value of RCC PLL1 VCI Range
Definition at line 71 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLSource |
RCC_PLLSource: PLL entry clock source. This parameter must be a value of RCC PLL Clock Source
Definition at line 51 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLState |
The new state of the PLL. This parameter can be a value of RCC PLL Config
Definition at line 48 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().
uint32_t RCC_PLLInitTypeDef::PLLVCOSEL |
PLLVCOSEL: PLL1 clock Output range This parameter must be a value of RCC PLL1 VCO Range
Definition at line 73 of file stm32h7xx_hal_rcc.h.
Referenced by HAL_RCC_GetOscConfig(), and HAL_RCC_OscConfig().