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STM32L443xx HAL User Manual
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Defines | |
| #define | QSPI_CLOCK_MODE_0 0x00000000U |
| #define | QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) |
| #define QSPI_CLOCK_MODE_0 0x00000000U |
Clk stays low while nCS is released
Definition at line 275 of file stm32l4xx_hal_qspi.h.
| #define QSPI_CLOCK_MODE_3 ((uint32_t)QUADSPI_DCR_CKMODE) |
Clk goes high while nCS is released
Definition at line 276 of file stm32l4xx_hal_qspi.h.
1.7.6.1