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STM32L443xx HAL User Manual
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Defines | |
| #define | LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 |
| #define | LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 |
| #define | LL_RCC_SYSCLK_DIV_4 RCC_CFGR_HPRE_DIV4 |
| #define | LL_RCC_SYSCLK_DIV_8 RCC_CFGR_HPRE_DIV8 |
| #define | LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 |
| #define | LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 |
| #define | LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 |
| #define | LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 |
| #define | LL_RCC_SYSCLK_DIV_512 RCC_CFGR_HPRE_DIV512 |
| #define LL_RCC_SYSCLK_DIV_1 RCC_CFGR_HPRE_DIV1 |
SYSCLK not divided
Definition at line 295 of file stm32l4xx_ll_rcc.h.
Referenced by LL_PLL_ConfigSystemClock_HSE(), LL_PLL_ConfigSystemClock_HSI(), and LL_PLL_ConfigSystemClock_MSI().
| #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 |
SYSCLK divided by 128
Definition at line 301 of file stm32l4xx_ll_rcc.h.
| #define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 |
SYSCLK divided by 16
Definition at line 299 of file stm32l4xx_ll_rcc.h.
| #define LL_RCC_SYSCLK_DIV_2 RCC_CFGR_HPRE_DIV2 |
SYSCLK divided by 2
Definition at line 296 of file stm32l4xx_ll_rcc.h.
Referenced by LL_PLL_ConfigSystemClock_HSE(), LL_PLL_ConfigSystemClock_HSI(), and LL_PLL_ConfigSystemClock_MSI().
| #define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 |
SYSCLK divided by 256
Definition at line 302 of file stm32l4xx_ll_rcc.h.
| #define LL_RCC_SYSCLK_DIV_4 RCC_CFGR_HPRE_DIV4 |
SYSCLK divided by 4
Definition at line 297 of file stm32l4xx_ll_rcc.h.
| #define LL_RCC_SYSCLK_DIV_512 RCC_CFGR_HPRE_DIV512 |
SYSCLK divided by 512
Definition at line 303 of file stm32l4xx_ll_rcc.h.
| #define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 |
SYSCLK divided by 64
Definition at line 300 of file stm32l4xx_ll_rcc.h.
| #define LL_RCC_SYSCLK_DIV_8 RCC_CFGR_HPRE_DIV8 |
SYSCLK divided by 8
Definition at line 298 of file stm32l4xx_ll_rcc.h.
1.7.6.1