Defines
#define	RCC_MCO1SOURCE_NOCLOCK 0x00000000U
#define	RCC_MCO1SOURCE_SYSCLK RCC_CFGR_MCOSEL_0
#define	RCC_MCO1SOURCE_MSI RCC_CFGR_MCOSEL_1
#define	RCC_MCO1SOURCE_HSI (RCC_CFGR_MCOSEL_0\| RCC_CFGR_MCOSEL_1)
#define	RCC_MCO1SOURCE_HSE RCC_CFGR_MCOSEL_2
#define	RCC_MCO1SOURCE_PLLCLK (RCC_CFGR_MCOSEL_0\|RCC_CFGR_MCOSEL_2)
#define	RCC_MCO1SOURCE_LSI (RCC_CFGR_MCOSEL_1\|RCC_CFGR_MCOSEL_2)
#define	RCC_MCO1SOURCE_LSE (RCC_CFGR_MCOSEL_0\|RCC_CFGR_MCOSEL_1\|RCC_CFGR_MCOSEL_2)
#define	RCC_MCO1SOURCE_HSI48 RCC_CFGR_MCOSEL_3

Define Documentation

#define RCC_MCO1SOURCE_HSE RCC_CFGR_MCOSEL_2

HSE selection as MCO1 source

Definition at line 507 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_HSI (RCC_CFGR_MCOSEL_0| RCC_CFGR_MCOSEL_1)

HSI selection as MCO1 source

Definition at line 506 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_HSI48 RCC_CFGR_MCOSEL_3

HSI48 selection as MCO1 source (STM32L43x/STM32L44x devices)

Definition at line 512 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_LSE (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2)

LSE selection as MCO1 source

Definition at line 510 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_LSI (RCC_CFGR_MCOSEL_1|RCC_CFGR_MCOSEL_2)

LSI selection as MCO1 source

Definition at line 509 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_MSI RCC_CFGR_MCOSEL_1

MSI selection as MCO1 source

Definition at line 505 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_NOCLOCK 0x00000000U

MCO1 output disabled, no clock on MCO1

Definition at line 503 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_PLLCLK (RCC_CFGR_MCOSEL_0|RCC_CFGR_MCOSEL_2)

PLLCLK selection as MCO1 source

Definition at line 508 of file stm32l4xx_hal_rcc.h.

#define RCC_MCO1SOURCE_SYSCLK RCC_CFGR_MCOSEL_0

SYSCLK selection as MCO1 source

Definition at line 504 of file stm32l4xx_hal_rcc.h.

Defines