STM32F103xB HAL User Manual
Functions
PLL
RCC Exported Functions

Functions

__STATIC_INLINE void LL_RCC_PLL_Enable (void)
 Enable PLL.
__STATIC_INLINE void LL_RCC_PLL_Disable (void)
 Disable PLL.
__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady (void)
 Check if PLL Ready.
__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS (uint32_t Source, uint32_t PLLMul)
 Configure PLL used for SYSCLK Domain.
__STATIC_INLINE void LL_RCC_PLL_SetMainSource (uint32_t PLLSource)
 Configure PLL clock source.
__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource (void)
 Get the oscillator used as PLL clock source.
__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator (void)
 Get PLL multiplication Factor.
__STATIC_INLINE uint32_t LL_RCC_PLL_GetPrediv (void)
 Get PREDIV1 division factor for the main PLL.

Function Documentation

__STATIC_INLINE void LL_RCC_PLL_ConfigDomain_SYS ( uint32_t  Source,
uint32_t  PLLMul 
)

Configure PLL used for SYSCLK Domain.

Reference Manual to LL API cross reference:
CFGR PLLSRC LL_RCC_PLL_ConfigDomain_SYS
CFGR PLLXTPRE LL_RCC_PLL_ConfigDomain_SYS
CFGR PLLMULL LL_RCC_PLL_ConfigDomain_SYS
CFGR2 PREDIV1 LL_RCC_PLL_ConfigDomain_SYS
CFGR2 PREDIV1SRC LL_RCC_PLL_ConfigDomain_SYS
Parameters:
SourceThis parameter can be one of the following values:
  • LL_RCC_PLLSOURCE_HSI_DIV_2
  • LL_RCC_PLLSOURCE_HSE_DIV_1
  • LL_RCC_PLLSOURCE_HSE_DIV_2 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_3 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_4 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_5 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_6 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_7 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_8 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_9 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_10 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_11 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_12 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_13 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_14 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_15 (*)
  • LL_RCC_PLLSOURCE_HSE_DIV_16 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_1 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_2 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_3 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_4 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_5 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_6 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_7 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_8 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_9 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_10 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_11 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_12 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_13 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_14 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_15 (*)
  • LL_RCC_PLLSOURCE_PLL2_DIV_16 (*)
(*) value not defined in all devices
PLLMulThis parameter can be one of the following values: (*) value not defined in all devices
Return values:
None

Definition at line 1477 of file stm32f1xx_ll_rcc.h.

Referenced by LL_PLL_ConfigSystemClock_HSE(), and LL_PLL_ConfigSystemClock_HSI().

__STATIC_INLINE void LL_RCC_PLL_Disable ( void  )

Disable PLL.

Note:
Cannot be disabled if the PLL clock is used as the system clock
Reference Manual to LL API cross reference:
CR PLLON LL_RCC_PLL_Disable
Return values:
None

Definition at line 1398 of file stm32f1xx_ll_rcc.h.

__STATIC_INLINE void LL_RCC_PLL_Enable ( void  )

Enable PLL.

Reference Manual to LL API cross reference:
CR PLLON LL_RCC_PLL_Enable
Return values:
None

Definition at line 1387 of file stm32f1xx_ll_rcc.h.

Referenced by UTILS_EnablePLLAndSwitchSystem().

__STATIC_INLINE uint32_t LL_RCC_PLL_GetMainSource ( void  )

Get the oscillator used as PLL clock source.

Reference Manual to LL API cross reference:
CFGR PLLSRC LL_RCC_PLL_GetMainSource
CFGR2 PREDIV1SRC LL_RCC_PLL_GetMainSource
Return values:
Returnedvalue can be one of the following values: (*) value not defined in all devices

Definition at line 1520 of file stm32f1xx_ll_rcc.h.

Referenced by RCC_PLL_GetFreqDomain_SYS(), and UTILS_EnablePLLAndSwitchSystem().

__STATIC_INLINE uint32_t LL_RCC_PLL_GetMultiplicator ( void  )

Get PLL multiplication Factor.

Reference Manual to LL API cross reference:
CFGR PLLMULL LL_RCC_PLL_GetMultiplicator
Return values:
Returnedvalue can be one of the following values: (*) value not defined in all devices

Definition at line 1554 of file stm32f1xx_ll_rcc.h.

Referenced by RCC_PLL_GetFreqDomain_SYS().

__STATIC_INLINE uint32_t LL_RCC_PLL_GetPrediv ( void  )

Get PREDIV1 division factor for the main PLL.

Note:
They can be written only when the PLL is disabled
Reference Manual to LL API cross reference:
CFGR2 PREDIV1 LL_RCC_PLL_GetPrediv
CFGR2 PLLXTPRE LL_RCC_PLL_GetPrediv
Return values:
Returnedvalue can be one of the following values:
  • LL_RCC_PREDIV_DIV_1
  • LL_RCC_PREDIV_DIV_2
  • LL_RCC_PREDIV_DIV_3 (*)
  • LL_RCC_PREDIV_DIV_4 (*)
  • LL_RCC_PREDIV_DIV_5 (*)
  • LL_RCC_PREDIV_DIV_6 (*)
  • LL_RCC_PREDIV_DIV_7 (*)
  • LL_RCC_PREDIV_DIV_8 (*)
  • LL_RCC_PREDIV_DIV_9 (*)
  • LL_RCC_PREDIV_DIV_10 (*)
  • LL_RCC_PREDIV_DIV_11 (*)
  • LL_RCC_PREDIV_DIV_12 (*)
  • LL_RCC_PREDIV_DIV_13 (*)
  • LL_RCC_PREDIV_DIV_14 (*)
  • LL_RCC_PREDIV_DIV_15 (*)
  • LL_RCC_PREDIV_DIV_16 (*)
(*) value not defined in all devices

Definition at line 1584 of file stm32f1xx_ll_rcc.h.

Referenced by RCC_PLL_GetFreqDomain_SYS().

__STATIC_INLINE uint32_t LL_RCC_PLL_IsReady ( void  )

Check if PLL Ready.

Reference Manual to LL API cross reference:
CR PLLRDY LL_RCC_PLL_IsReady
Return values:
Stateof bit (1 or 0).

Definition at line 1408 of file stm32f1xx_ll_rcc.h.

Referenced by LL_RCC_DeInit(), LL_RCC_GetUSBClockFreq(), UTILS_EnablePLLAndSwitchSystem(), and UTILS_PLL_IsBusy().

__STATIC_INLINE void LL_RCC_PLL_SetMainSource ( uint32_t  PLLSource)

Configure PLL clock source.

Reference Manual to LL API cross reference:
CFGR PLLSRC LL_RCC_PLL_SetMainSource
CFGR2 PREDIV1SRC LL_RCC_PLL_SetMainSource
Parameters:
PLLSourceThis parameter can be one of the following values:
Return values:
None

Definition at line 1501 of file stm32f1xx_ll_rcc.h.