stm32f1xx_ll_rcc.h File Reference

Header file of RCC LL module. More...

#include "stm32f1xx.h"

Go to the source code of this file.

Data Structures
struct	LL_RCC_ClocksTypeDef
	RCC Clocks Frequency Structure. More...
Defines
#define	LL_RCC_CIR_LSIRDYC   RCC_CIR_LSIRDYC
#define	LL_RCC_CIR_LSERDYC   RCC_CIR_LSERDYC
#define	LL_RCC_CIR_HSIRDYC   RCC_CIR_HSIRDYC
#define	LL_RCC_CIR_HSERDYC   RCC_CIR_HSERDYC
#define	LL_RCC_CIR_PLLRDYC   RCC_CIR_PLLRDYC
#define	LL_RCC_CIR_PLL3RDYC   RCC_CIR_PLL3RDYC
#define	LL_RCC_CIR_PLL2RDYC   RCC_CIR_PLL2RDYC
#define	LL_RCC_CIR_CSSC   RCC_CIR_CSSC
#define	LL_RCC_CIR_LSIRDYF   RCC_CIR_LSIRDYF
#define	LL_RCC_CIR_LSERDYF   RCC_CIR_LSERDYF
#define	LL_RCC_CIR_HSIRDYF   RCC_CIR_HSIRDYF
#define	LL_RCC_CIR_HSERDYF   RCC_CIR_HSERDYF
#define	LL_RCC_CIR_PLLRDYF   RCC_CIR_PLLRDYF
#define	LL_RCC_CIR_PLL3RDYF   RCC_CIR_PLL3RDYF
#define	LL_RCC_CIR_PLL2RDYF   RCC_CIR_PLL2RDYF
#define	LL_RCC_CIR_CSSF   RCC_CIR_CSSF
#define	LL_RCC_CSR_PINRSTF   RCC_CSR_PINRSTF
#define	LL_RCC_CSR_PORRSTF   RCC_CSR_PORRSTF
#define	LL_RCC_CSR_SFTRSTF   RCC_CSR_SFTRSTF
#define	LL_RCC_CSR_IWDGRSTF   RCC_CSR_IWDGRSTF
#define	LL_RCC_CSR_WWDGRSTF   RCC_CSR_WWDGRSTF
#define	LL_RCC_CSR_LPWRRSTF   RCC_CSR_LPWRRSTF
#define	LL_RCC_CIR_LSIRDYIE   RCC_CIR_LSIRDYIE
#define	LL_RCC_CIR_LSERDYIE   RCC_CIR_LSERDYIE
#define	LL_RCC_CIR_HSIRDYIE   RCC_CIR_HSIRDYIE
#define	LL_RCC_CIR_HSERDYIE   RCC_CIR_HSERDYIE
#define	LL_RCC_CIR_PLLRDYIE   RCC_CIR_PLLRDYIE
#define	LL_RCC_CIR_PLL3RDYIE   RCC_CIR_PLL3RDYIE
#define	LL_RCC_CIR_PLL2RDYIE   RCC_CIR_PLL2RDYIE
#define	LL_RCC_SYS_CLKSOURCE_HSI   RCC_CFGR_SW_HSI
#define	LL_RCC_SYS_CLKSOURCE_HSE   RCC_CFGR_SW_HSE
#define	LL_RCC_SYS_CLKSOURCE_PLL   RCC_CFGR_SW_PLL
#define	LL_RCC_SYS_CLKSOURCE_STATUS_HSI   RCC_CFGR_SWS_HSI
#define	LL_RCC_SYS_CLKSOURCE_STATUS_HSE   RCC_CFGR_SWS_HSE
#define	LL_RCC_SYS_CLKSOURCE_STATUS_PLL   RCC_CFGR_SWS_PLL
#define	LL_RCC_SYSCLK_DIV_1   RCC_CFGR_HPRE_DIV1
#define	LL_RCC_SYSCLK_DIV_2   RCC_CFGR_HPRE_DIV2
#define	LL_RCC_SYSCLK_DIV_4   RCC_CFGR_HPRE_DIV4
#define	LL_RCC_SYSCLK_DIV_8   RCC_CFGR_HPRE_DIV8
#define	LL_RCC_SYSCLK_DIV_16   RCC_CFGR_HPRE_DIV16
#define	LL_RCC_SYSCLK_DIV_64   RCC_CFGR_HPRE_DIV64
#define	LL_RCC_SYSCLK_DIV_128   RCC_CFGR_HPRE_DIV128
#define	LL_RCC_SYSCLK_DIV_256   RCC_CFGR_HPRE_DIV256
#define	LL_RCC_SYSCLK_DIV_512   RCC_CFGR_HPRE_DIV512
#define	LL_RCC_APB1_DIV_1   RCC_CFGR_PPRE1_DIV1
#define	LL_RCC_APB1_DIV_2   RCC_CFGR_PPRE1_DIV2
#define	LL_RCC_APB1_DIV_4   RCC_CFGR_PPRE1_DIV4
#define	LL_RCC_APB1_DIV_8   RCC_CFGR_PPRE1_DIV8
#define	LL_RCC_APB1_DIV_16   RCC_CFGR_PPRE1_DIV16
#define	LL_RCC_APB2_DIV_1   RCC_CFGR_PPRE2_DIV1
#define	LL_RCC_APB2_DIV_2   RCC_CFGR_PPRE2_DIV2
#define	LL_RCC_APB2_DIV_4   RCC_CFGR_PPRE2_DIV4
#define	LL_RCC_APB2_DIV_8   RCC_CFGR_PPRE2_DIV8
#define	LL_RCC_APB2_DIV_16   RCC_CFGR_PPRE2_DIV16
#define	LL_RCC_MCO1SOURCE_NOCLOCK   RCC_CFGR_MCO_NOCLOCK
#define	LL_RCC_MCO1SOURCE_SYSCLK   RCC_CFGR_MCO_SYSCLK
#define	LL_RCC_MCO1SOURCE_HSI   RCC_CFGR_MCO_HSI
#define	LL_RCC_MCO1SOURCE_HSE   RCC_CFGR_MCO_HSE
#define	LL_RCC_MCO1SOURCE_PLLCLK_DIV_2   RCC_CFGR_MCO_PLLCLK_DIV2
#define	LL_RCC_PERIPH_FREQUENCY_NO   0x00000000U
#define	LL_RCC_PERIPH_FREQUENCY_NA   0xFFFFFFFFU
#define	LL_RCC_USB_CLKSOURCE_PLL   RCC_CFGR_USBPRE
#define	LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5   0x00000000U
#define	LL_RCC_ADC_CLKSRC_PCLK2_DIV_2   RCC_CFGR_ADCPRE_DIV2 /*ADC prescaler PCLK2 divided by 2*/
#define	LL_RCC_ADC_CLKSRC_PCLK2_DIV_4   RCC_CFGR_ADCPRE_DIV4 /*ADC prescaler PCLK2 divided by 4*/
#define	LL_RCC_ADC_CLKSRC_PCLK2_DIV_6   RCC_CFGR_ADCPRE_DIV6 /*ADC prescaler PCLK2 divided by 6*/
#define	LL_RCC_ADC_CLKSRC_PCLK2_DIV_8   RCC_CFGR_ADCPRE_DIV8 /*ADC prescaler PCLK2 divided by 8*/
#define	LL_RCC_USB_CLKSOURCE   0x00400000U
#define	LL_RCC_ADC_CLKSOURCE   RCC_CFGR_ADCPRE
#define	LL_RCC_RTC_CLKSOURCE_NONE   0x00000000U
#define	LL_RCC_RTC_CLKSOURCE_LSE   RCC_BDCR_RTCSEL_0
#define	LL_RCC_RTC_CLKSOURCE_LSI   RCC_BDCR_RTCSEL_1
#define	LL_RCC_RTC_CLKSOURCE_HSE_DIV128   RCC_BDCR_RTCSEL
#define	LL_RCC_PLL_MUL_2   RCC_CFGR_PLLMULL2
#define	LL_RCC_PLL_MUL_3   RCC_CFGR_PLLMULL3
#define	LL_RCC_PLL_MUL_4   RCC_CFGR_PLLMULL4
#define	LL_RCC_PLL_MUL_5   RCC_CFGR_PLLMULL5
#define	LL_RCC_PLL_MUL_6   RCC_CFGR_PLLMULL6
#define	LL_RCC_PLL_MUL_7   RCC_CFGR_PLLMULL7
#define	LL_RCC_PLL_MUL_8   RCC_CFGR_PLLMULL8
#define	LL_RCC_PLL_MUL_9   RCC_CFGR_PLLMULL9
#define	LL_RCC_PLL_MUL_10   RCC_CFGR_PLLMULL10
#define	LL_RCC_PLL_MUL_11   RCC_CFGR_PLLMULL11
#define	LL_RCC_PLL_MUL_12   RCC_CFGR_PLLMULL12
#define	LL_RCC_PLL_MUL_13   RCC_CFGR_PLLMULL13
#define	LL_RCC_PLL_MUL_14   RCC_CFGR_PLLMULL14
#define	LL_RCC_PLL_MUL_15   RCC_CFGR_PLLMULL15
#define	LL_RCC_PLL_MUL_16   RCC_CFGR_PLLMULL16
#define	LL_RCC_PLLSOURCE_HSI_DIV_2   0x00000000U
#define	LL_RCC_PLLSOURCE_HSE   RCC_CFGR_PLLSRC
#define	LL_RCC_PLLSOURCE_HSE_DIV_1   (RCC_CFGR_PLLSRC | 0x00000000U)
#define	LL_RCC_PLLSOURCE_HSE_DIV_2   (RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE)
#define	LL_RCC_PREDIV_DIV_1   0x00000000U
#define	LL_RCC_PREDIV_DIV_2   RCC_CFGR_PLLXTPRE
#define	LL_RCC_WriteReg(__REG__, __VALUE__)   WRITE_REG(RCC->__REG__, (__VALUE__))
	Write a value in RCC register.
#define	LL_RCC_ReadReg(__REG__)   READ_REG(RCC->__REG__)
	Read a value in RCC register.
#define	__LL_RCC_CALC_PLLCLK_FREQ(__INPUTFREQ__, __PLLMUL__)   ((__INPUTFREQ__) * (((__PLLMUL__) >> RCC_CFGR_PLLMULL_Pos) + 2U))
	Helper macro to calculate the PLLCLK frequency.
#define	__LL_RCC_CALC_HCLK_FREQ(__SYSCLKFREQ__, __AHBPRESCALER__)   ((__SYSCLKFREQ__) >> AHBPrescTable[((__AHBPRESCALER__) & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos])
	Helper macro to calculate the HCLK frequency.
#define	__LL_RCC_CALC_PCLK1_FREQ(__HCLKFREQ__, __APB1PRESCALER__)   ((__HCLKFREQ__) >> APBPrescTable[(__APB1PRESCALER__) >> RCC_CFGR_PPRE1_Pos])
	Helper macro to calculate the PCLK1 frequency (ABP1)
#define	__LL_RCC_CALC_PCLK2_FREQ(__HCLKFREQ__, __APB2PRESCALER__)   ((__HCLKFREQ__) >> APBPrescTable[(__APB2PRESCALER__) >> RCC_CFGR_PPRE2_Pos])
	Helper macro to calculate the PCLK2 frequency (ABP2)
Functions
__STATIC_INLINE void	LL_RCC_HSE_EnableCSS (void)
	Enable the Clock Security System.
__STATIC_INLINE void	LL_RCC_HSE_EnableBypass (void)
	Enable HSE external oscillator (HSE Bypass)
__STATIC_INLINE void	LL_RCC_HSE_DisableBypass (void)
	Disable HSE external oscillator (HSE Bypass)
__STATIC_INLINE void	LL_RCC_HSE_Enable (void)
	Enable HSE crystal oscillator (HSE ON)
__STATIC_INLINE void	LL_RCC_HSE_Disable (void)
	Disable HSE crystal oscillator (HSE ON)
__STATIC_INLINE uint32_t	LL_RCC_HSE_IsReady (void)
	Check if HSE oscillator Ready.
__STATIC_INLINE void	LL_RCC_HSI_Enable (void)
	Enable HSI oscillator.
__STATIC_INLINE void	LL_RCC_HSI_Disable (void)
	Disable HSI oscillator.
__STATIC_INLINE uint32_t	LL_RCC_HSI_IsReady (void)
	Check if HSI clock is ready.
__STATIC_INLINE uint32_t	LL_RCC_HSI_GetCalibration (void)
	Get HSI Calibration value.
__STATIC_INLINE void	LL_RCC_HSI_SetCalibTrimming (uint32_t Value)
	Set HSI Calibration trimming.
__STATIC_INLINE uint32_t	LL_RCC_HSI_GetCalibTrimming (void)
	Get HSI Calibration trimming.
__STATIC_INLINE void	LL_RCC_LSE_Enable (void)
	Enable Low Speed External (LSE) crystal.
__STATIC_INLINE void	LL_RCC_LSE_Disable (void)
	Disable Low Speed External (LSE) crystal.
__STATIC_INLINE void	LL_RCC_LSE_EnableBypass (void)
	Enable external clock source (LSE bypass).
__STATIC_INLINE void	LL_RCC_LSE_DisableBypass (void)
	Disable external clock source (LSE bypass).
__STATIC_INLINE uint32_t	LL_RCC_LSE_IsReady (void)
	Check if LSE oscillator Ready.
__STATIC_INLINE void	LL_RCC_LSI_Enable (void)
	Enable LSI Oscillator.
__STATIC_INLINE void	LL_RCC_LSI_Disable (void)
	Disable LSI Oscillator.
__STATIC_INLINE uint32_t	LL_RCC_LSI_IsReady (void)
	Check if LSI is Ready.
__STATIC_INLINE void	LL_RCC_SetSysClkSource (uint32_t Source)
	Configure the system clock source.
__STATIC_INLINE uint32_t	LL_RCC_GetSysClkSource (void)
	Get the system clock source.
__STATIC_INLINE void	LL_RCC_SetAHBPrescaler (uint32_t Prescaler)
	Set AHB prescaler.
__STATIC_INLINE void	LL_RCC_SetAPB1Prescaler (uint32_t Prescaler)
	Set APB1 prescaler.
__STATIC_INLINE void	LL_RCC_SetAPB2Prescaler (uint32_t Prescaler)
	Set APB2 prescaler.
__STATIC_INLINE uint32_t	LL_RCC_GetAHBPrescaler (void)
	Get AHB prescaler.
__STATIC_INLINE uint32_t	LL_RCC_GetAPB1Prescaler (void)
	Get APB1 prescaler.
__STATIC_INLINE uint32_t	LL_RCC_GetAPB2Prescaler (void)
	Get APB2 prescaler.
__STATIC_INLINE void	LL_RCC_ConfigMCO (uint32_t MCOxSource)
	Configure MCOx.
__STATIC_INLINE void	LL_RCC_SetUSBClockSource (uint32_t USBxSource)
	Configure USB clock source.
__STATIC_INLINE void	LL_RCC_SetADCClockSource (uint32_t ADCxSource)
	Configure ADC clock source.
__STATIC_INLINE uint32_t	LL_RCC_GetUSBClockSource (uint32_t USBx)
	Get USBx clock source.
__STATIC_INLINE uint32_t	LL_RCC_GetADCClockSource (uint32_t ADCx)
	Get ADCx clock source.
__STATIC_INLINE void	LL_RCC_SetRTCClockSource (uint32_t Source)
	Set RTC Clock Source.
__STATIC_INLINE uint32_t	LL_RCC_GetRTCClockSource (void)
	Get RTC Clock Source.
__STATIC_INLINE void	LL_RCC_EnableRTC (void)
	Enable RTC.
__STATIC_INLINE void	LL_RCC_DisableRTC (void)
	Disable RTC.
__STATIC_INLINE uint32_t	LL_RCC_IsEnabledRTC (void)
	Check if RTC has been enabled or not.
__STATIC_INLINE void	LL_RCC_ForceBackupDomainReset (void)
	Force the Backup domain reset.
__STATIC_INLINE void	LL_RCC_ReleaseBackupDomainReset (void)
	Release the Backup domain reset.
__STATIC_INLINE void	LL_RCC_PLL_Enable (void)
	Enable PLL.
__STATIC_INLINE void	LL_RCC_PLL_Disable (void)
	Disable PLL.
__STATIC_INLINE uint32_t	LL_RCC_PLL_IsReady (void)
	Check if PLL Ready.
__STATIC_INLINE void	LL_RCC_PLL_ConfigDomain_SYS (uint32_t Source, uint32_t PLLMul)
	Configure PLL used for SYSCLK Domain.
__STATIC_INLINE void	LL_RCC_PLL_SetMainSource (uint32_t PLLSource)
	Configure PLL clock source.
__STATIC_INLINE uint32_t	LL_RCC_PLL_GetMainSource (void)
	Get the oscillator used as PLL clock source.
__STATIC_INLINE uint32_t	LL_RCC_PLL_GetMultiplicator (void)
	Get PLL multiplication Factor.
__STATIC_INLINE uint32_t	LL_RCC_PLL_GetPrediv (void)
	Get PREDIV1 division factor for the main PLL.
__STATIC_INLINE void	LL_RCC_ClearFlag_LSIRDY (void)
	Clear LSI ready interrupt flag.
__STATIC_INLINE void	LL_RCC_ClearFlag_LSERDY (void)
	Clear LSE ready interrupt flag.
__STATIC_INLINE void	LL_RCC_ClearFlag_HSIRDY (void)
	Clear HSI ready interrupt flag.
__STATIC_INLINE void	LL_RCC_ClearFlag_HSERDY (void)
	Clear HSE ready interrupt flag.
__STATIC_INLINE void	LL_RCC_ClearFlag_PLLRDY (void)
	Clear PLL ready interrupt flag.
__STATIC_INLINE void	LL_RCC_ClearFlag_HSECSS (void)
	Clear Clock security system interrupt flag.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_LSIRDY (void)
	Check if LSI ready interrupt occurred or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_LSERDY (void)
	Check if LSE ready interrupt occurred or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_HSIRDY (void)
	Check if HSI ready interrupt occurred or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_HSERDY (void)
	Check if HSE ready interrupt occurred or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_PLLRDY (void)
	Check if PLL ready interrupt occurred or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_HSECSS (void)
	Check if Clock security system interrupt occurred or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_IWDGRST (void)
	Check if RCC flag Independent Watchdog reset is set or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_LPWRRST (void)
	Check if RCC flag Low Power reset is set or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_PINRST (void)
	Check if RCC flag Pin reset is set or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_PORRST (void)
	Check if RCC flag POR/PDR reset is set or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_SFTRST (void)
	Check if RCC flag Software reset is set or not.
__STATIC_INLINE uint32_t	LL_RCC_IsActiveFlag_WWDGRST (void)
	Check if RCC flag Window Watchdog reset is set or not.
__STATIC_INLINE void	LL_RCC_ClearResetFlags (void)
	Set RMVF bit to clear the reset flags.
__STATIC_INLINE void	LL_RCC_EnableIT_LSIRDY (void)
	Enable LSI ready interrupt.
__STATIC_INLINE void	LL_RCC_EnableIT_LSERDY (void)
	Enable LSE ready interrupt.
__STATIC_INLINE void	LL_RCC_EnableIT_HSIRDY (void)
	Enable HSI ready interrupt.
__STATIC_INLINE void	LL_RCC_EnableIT_HSERDY (void)
	Enable HSE ready interrupt.
__STATIC_INLINE void	LL_RCC_EnableIT_PLLRDY (void)
	Enable PLL ready interrupt.
__STATIC_INLINE void	LL_RCC_DisableIT_LSIRDY (void)
	Disable LSI ready interrupt.
__STATIC_INLINE void	LL_RCC_DisableIT_LSERDY (void)
	Disable LSE ready interrupt.
__STATIC_INLINE void	LL_RCC_DisableIT_HSIRDY (void)
	Disable HSI ready interrupt.
__STATIC_INLINE void	LL_RCC_DisableIT_HSERDY (void)
	Disable HSE ready interrupt.
__STATIC_INLINE void	LL_RCC_DisableIT_PLLRDY (void)
	Disable PLL ready interrupt.
__STATIC_INLINE uint32_t	LL_RCC_IsEnabledIT_LSIRDY (void)
	Checks if LSI ready interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_RCC_IsEnabledIT_LSERDY (void)
	Checks if LSE ready interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_RCC_IsEnabledIT_HSIRDY (void)
	Checks if HSI ready interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_RCC_IsEnabledIT_HSERDY (void)
	Checks if HSE ready interrupt source is enabled or disabled.
__STATIC_INLINE uint32_t	LL_RCC_IsEnabledIT_PLLRDY (void)
	Checks if PLL ready interrupt source is enabled or disabled.
ErrorStatus	LL_RCC_DeInit (void)
	Reset the RCC clock configuration to the default reset state.
void	LL_RCC_GetSystemClocksFreq (LL_RCC_ClocksTypeDef *RCC_Clocks)
	Return the frequencies of different on chip clocks; System, AHB, APB1 and APB2 buses clocks.
uint32_t	LL_RCC_GetUSBClockFreq (uint32_t USBxSource)
	Return USBx clock frequency.
uint32_t	LL_RCC_GetADCClockFreq (uint32_t ADCxSource)
	Return ADCx clock frequency.

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Detailed Description

Header file of RCC LL module.

Author:

MCD Application Team

Attention:

© Copyright (c) 2016 STMicroelectronics. All rights reserved.

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause

Definition in file stm32f1xx_ll_rcc.h.