CHANNEL

Defines
#define	LL_DMA_CHANNEL_0   0x00000000U /* Select Channel0 of DMA Instance */
#define	LL_DMA_CHANNEL_1   DMA_SxCR_CHSEL_0 /* Select Channel1 of DMA Instance */
#define	LL_DMA_CHANNEL_2   DMA_SxCR_CHSEL_1 /* Select Channel2 of DMA Instance */
#define	LL_DMA_CHANNEL_3   (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1) /* Select Channel3 of DMA Instance */
#define	LL_DMA_CHANNEL_4   DMA_SxCR_CHSEL_2 /* Select Channel4 of DMA Instance */
#define	LL_DMA_CHANNEL_5   (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) /* Select Channel5 of DMA Instance */
#define	LL_DMA_CHANNEL_6   (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) /* Select Channel6 of DMA Instance */
#define	LL_DMA_CHANNEL_7   (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) /* Select Channel7 of DMA Instance */

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Define Documentation

#define LL_DMA_CHANNEL_0   0x00000000U /* Select Channel0 of DMA Instance */

Definition at line 288 of file stm32f4xx_ll_dma.h.

Referenced by LL_DMA_DeInit(), and LL_DMA_StructInit().

#define LL_DMA_CHANNEL_1   DMA_SxCR_CHSEL_0 /* Select Channel1 of DMA Instance */

Definition at line 289 of file stm32f4xx_ll_dma.h.

#define LL_DMA_CHANNEL_2   DMA_SxCR_CHSEL_1 /* Select Channel2 of DMA Instance */

Definition at line 290 of file stm32f4xx_ll_dma.h.

#define LL_DMA_CHANNEL_3   (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1) /* Select Channel3 of DMA Instance */

Definition at line 291 of file stm32f4xx_ll_dma.h.

#define LL_DMA_CHANNEL_4   DMA_SxCR_CHSEL_2 /* Select Channel4 of DMA Instance */

Definition at line 292 of file stm32f4xx_ll_dma.h.

#define LL_DMA_CHANNEL_5   (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0) /* Select Channel5 of DMA Instance */

Definition at line 293 of file stm32f4xx_ll_dma.h.

#define LL_DMA_CHANNEL_6   (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1) /* Select Channel6 of DMA Instance */

Definition at line 294 of file stm32f4xx_ll_dma.h.

#define LL_DMA_CHANNEL_7   (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0) /* Select Channel7 of DMA Instance */

Definition at line 295 of file stm32f4xx_ll_dma.h.