STM32F479xx HAL User Manual
Defines
AHB1 Peripheral Clock Enable Disable
RCCEx Exported Macros

Enables or disables the AHB1 peripheral clock. More...

Defines

#define __HAL_RCC_BKPSRAM_CLK_ENABLE()
#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE()
#define __HAL_RCC_CRC_CLK_ENABLE()
#define __HAL_RCC_GPIOD_CLK_ENABLE()
#define __HAL_RCC_GPIOE_CLK_ENABLE()
#define __HAL_RCC_GPIOI_CLK_ENABLE()
#define __HAL_RCC_GPIOF_CLK_ENABLE()
#define __HAL_RCC_GPIOG_CLK_ENABLE()
#define __HAL_RCC_GPIOJ_CLK_ENABLE()
#define __HAL_RCC_GPIOK_CLK_ENABLE()
#define __HAL_RCC_DMA2D_CLK_ENABLE()
#define __HAL_RCC_ETHMAC_CLK_ENABLE()
#define __HAL_RCC_ETHMACTX_CLK_ENABLE()
#define __HAL_RCC_ETHMACRX_CLK_ENABLE()
#define __HAL_RCC_ETHMACPTP_CLK_ENABLE()
#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE()
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE()
#define __HAL_RCC_GPIOD_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))
#define __HAL_RCC_GPIOE_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))
#define __HAL_RCC_GPIOF_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN))
#define __HAL_RCC_GPIOG_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN))
#define __HAL_RCC_GPIOI_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOIEN))
#define __HAL_RCC_GPIOJ_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOJEN))
#define __HAL_RCC_GPIOK_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOKEN))
#define __HAL_RCC_DMA2D_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2DEN))
#define __HAL_RCC_ETHMAC_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACEN))
#define __HAL_RCC_ETHMACTX_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACTXEN))
#define __HAL_RCC_ETHMACRX_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACRXEN))
#define __HAL_RCC_ETHMACPTP_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACPTPEN))
#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN))
#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN))
#define __HAL_RCC_BKPSRAM_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN))
#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))
#define __HAL_RCC_CRC_CLK_DISABLE()   (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))
#define __HAL_RCC_ETH_CLK_ENABLE()
 Enable ETHERNET clock.
#define __HAL_RCC_ETH_CLK_DISABLE()
 Disable ETHERNET clock.

Detailed Description

Enables or disables the AHB1 peripheral clock.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_BKPSRAM_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_BKPSRAMEN))

Definition at line 1105 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_BKPSRAM_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_BKPSRAMEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 972 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_CCMDATARAMEN_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CCMDATARAMEN))

Definition at line 1106 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_CCMDATARAMEN_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CCMDATARAMEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 979 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_CRC_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_CRCEN))

Definition at line 1107 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_CRC_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 986 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_DMA2D_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_DMA2DEN))

Definition at line 1098 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_DMA2D_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1042 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETH_CLK_DISABLE ( )
Value:
do {                                      \
                                          __HAL_RCC_ETHMACTX_CLK_DISABLE();    \
                                          __HAL_RCC_ETHMACRX_CLK_DISABLE();    \
                                          __HAL_RCC_ETHMAC_CLK_DISABLE();      \
                                        } while(0U)

Disable ETHERNET clock.

Definition at line 1120 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETH_CLK_ENABLE ( )
Value:
do {                                     \
                                        __HAL_RCC_ETHMAC_CLK_ENABLE();      \
                                        __HAL_RCC_ETHMACTX_CLK_ENABLE();    \
                                        __HAL_RCC_ETHMACRX_CLK_ENABLE();    \
                                      } while(0U)

Enable ETHERNET clock.

Definition at line 1112 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMAC_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACEN))

Definition at line 1099 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMAC_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1049 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMACPTP_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACPTPEN))

Definition at line 1102 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMACPTP_CLK_ENABLE ( )
Value:
do { \
                                         __IO uint32_t tmpreg = 0x00U; \
                                         SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\
                                         /* Delay after an RCC peripheral clock enabling */ \
                                         tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACPTPEN);\
                                         UNUSED(tmpreg); \
                                         } while(0U)

Definition at line 1070 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMACRX_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACRXEN))

Definition at line 1101 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMACRX_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACRXEN);\
                                         UNUSED(tmpreg); \
                                         } while(0U)

Definition at line 1063 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMACTX_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_ETHMACTXEN))

Definition at line 1100 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_ETHMACTX_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHMACTXEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1056 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOD_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIODEN))

Definition at line 1091 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOD_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIODEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 993 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOE_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOEEN))

Definition at line 1092 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOE_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOEEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1000 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOF_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOFEN))

Definition at line 1093 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOF_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOFEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1014 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOG_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOGEN))

Definition at line 1094 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOG_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOGEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1021 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOI_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOIEN))

Definition at line 1095 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOI_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOIEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1007 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOJ_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOJEN))

Definition at line 1096 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOJ_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOJEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOJEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1028 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOK_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOKEN))

Definition at line 1097 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_GPIOK_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOKEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPIOKEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1035 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_USB_OTG_HS_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSEN))

Definition at line 1103 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_USB_OTG_HS_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1077 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE ( )    (RCC->AHB1ENR &= ~(RCC_AHB1ENR_OTGHSULPIEN))

Definition at line 1104 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE ( )
Value:
do { \
                                        __IO uint32_t tmpreg = 0x00U; \
                                        SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
                                        /* Delay after an RCC peripheral clock enabling */ \
                                        tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_OTGHSULPIEN);\
                                        UNUSED(tmpreg); \
                                        } while(0U)

Definition at line 1084 of file stm32f4xx_hal_rcc_ex.h.

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