STM32F479xx HAL User Manual
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Get the enable or disable status of the AHB1 peripheral clock. More...
Defines | |
#define | __HAL_RCC_GPIOD_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET) |
#define | __HAL_RCC_GPIOE_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET) |
#define | __HAL_RCC_GPIOF_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET) |
#define | __HAL_RCC_GPIOG_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET) |
#define | __HAL_RCC_GPIOI_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) != RESET) |
#define | __HAL_RCC_GPIOJ_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOJEN)) != RESET) |
#define | __HAL_RCC_GPIOK_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOKEN)) != RESET) |
#define | __HAL_RCC_DMA2D_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2DEN)) != RESET) |
#define | __HAL_RCC_ETHMAC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) != RESET) |
#define | __HAL_RCC_ETHMACTX_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) != RESET) |
#define | __HAL_RCC_ETHMACRX_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) != RESET) |
#define | __HAL_RCC_ETHMACPTP_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) != RESET) |
#define | __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET) |
#define | __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET) |
#define | __HAL_RCC_BKPSRAM_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET) |
#define | __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) != RESET) |
#define | __HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET) |
#define | __HAL_RCC_ETH_IS_CLK_ENABLED() |
#define | __HAL_RCC_GPIOD_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET) |
#define | __HAL_RCC_GPIOE_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET) |
#define | __HAL_RCC_GPIOF_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET) |
#define | __HAL_RCC_GPIOG_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET) |
#define | __HAL_RCC_GPIOI_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) == RESET) |
#define | __HAL_RCC_GPIOJ_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOJEN)) == RESET) |
#define | __HAL_RCC_GPIOK_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOKEN)) == RESET) |
#define | __HAL_RCC_DMA2D_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2DEN)) == RESET) |
#define | __HAL_RCC_ETHMAC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) == RESET) |
#define | __HAL_RCC_ETHMACTX_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) == RESET) |
#define | __HAL_RCC_ETHMACRX_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) == RESET) |
#define | __HAL_RCC_ETHMACPTP_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) == RESET) |
#define | __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET) |
#define | __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) == RESET) |
#define | __HAL_RCC_BKPSRAM_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET) |
#define | __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET) |
#define | __HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET) |
#define | __HAL_RCC_ETH_IS_CLK_DISABLED() |
Get the enable or disable status of the AHB1 peripheral clock.
#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET) |
Definition at line 1171 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET) |
Definition at line 1150 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CCMDATARAMEN_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) == RESET) |
Definition at line 1172 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CCMDATARAMEN_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_CCMDATARAMEN)) != RESET) |
Definition at line 1151 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CRC_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET) |
Definition at line 1173 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_CRC_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET) |
Definition at line 1152 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_DMA2D_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2DEN)) == RESET) |
Definition at line 1164 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_DMA2D_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2DEN)) != RESET) |
Definition at line 1143 of file stm32f4xx_hal_rcc_ex.h.
Referenced by HAL_DMA2D_DeInit().
#define __HAL_RCC_ETH_IS_CLK_DISABLED | ( | ) |
(__HAL_RCC_ETHMAC_IS_CLK_DISABLED() && \ __HAL_RCC_ETHMACTX_IS_CLK_DISABLED() && \ __HAL_RCC_ETHMACRX_IS_CLK_DISABLED())
Definition at line 1174 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETH_IS_CLK_ENABLED | ( | ) |
(__HAL_RCC_ETHMAC_IS_CLK_ENABLED() && \ __HAL_RCC_ETHMACTX_IS_CLK_ENABLED() && \ __HAL_RCC_ETHMACRX_IS_CLK_ENABLED())
Definition at line 1153 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMAC_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) == RESET) |
Definition at line 1165 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMAC_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACEN)) != RESET) |
Definition at line 1144 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACPTP_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) == RESET) |
Definition at line 1168 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACPTP_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACPTPEN)) != RESET) |
Definition at line 1147 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACRX_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) == RESET) |
Definition at line 1167 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACRX_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACRXEN)) != RESET) |
Definition at line 1146 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACTX_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) == RESET) |
Definition at line 1166 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_ETHMACTX_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_ETHMACTXEN)) != RESET) |
Definition at line 1145 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOD_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET) |
Definition at line 1157 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOD_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET) |
Definition at line 1136 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOE_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET) |
Definition at line 1158 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOE_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET) |
Definition at line 1137 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOF_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET) |
Definition at line 1159 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOF_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET) |
Definition at line 1138 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOG_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET) |
Definition at line 1160 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOG_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET) |
Definition at line 1139 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOI_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) == RESET) |
Definition at line 1161 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOI_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) != RESET) |
Definition at line 1140 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOJ_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOJEN)) == RESET) |
Definition at line 1162 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOJ_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOJEN)) != RESET) |
Definition at line 1141 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOK_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOKEN)) == RESET) |
Definition at line 1163 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_GPIOK_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOKEN)) != RESET) |
Definition at line 1142 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET) |
Definition at line 1169 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET) |
Definition at line 1148 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) == RESET) |
Definition at line 1170 of file stm32f4xx_hal_rcc_ex.h.
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED | ( | ) | ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET) |
Definition at line 1149 of file stm32f4xx_hal_rcc_ex.h.