AHB3 Peripheral Clock Enable Disable

Enables or disables the AHB3 peripheral clock. More...

Defines
#define	__HAL_RCC_FMC_CLK_ENABLE()
#define	__HAL_RCC_FMC_CLK_DISABLE()   (RCC->AHB3ENR &= ~(RCC_AHB3ENR_FMCEN))
#define	__HAL_RCC_QSPI_CLK_ENABLE()
#define	__HAL_RCC_QSPI_CLK_DISABLE()   (RCC->AHB3ENR &= ~(RCC_AHB3ENR_QSPIEN))

---

Detailed Description

Enables or disables the AHB3 peripheral clock.

Note:

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

---

Define Documentation

#define __HAL_RCC_FMC_CLK_DISABLE

(

)

(RCC->AHB3ENR &= ~(RCC_AHB3ENR_FMCEN))

Definition at line 1276 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_FMC_CLK_ENABLE

(

)

Value:

do { \
                                      __IO uint32_t tmpreg = 0x00U; \
                                      SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);\
                                      /* Delay after an RCC peripheral clock enabling */ \
                                      tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_FMCEN);\
                                      UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1269 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_QSPI_CLK_DISABLE

(

)

(RCC->AHB3ENR &= ~(RCC_AHB3ENR_QSPIEN))

Definition at line 1285 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_QSPI_CLK_ENABLE

(

)

Value:

do { \
                                      __IO uint32_t tmpreg = 0x00U; \
                                      SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
                                      /* Delay after an RCC peripheral clock enabling */ \
                                      tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN);\
                                      UNUSED(tmpreg); \
                                      } while(0U)

Definition at line 1278 of file stm32f4xx_hal_rcc_ex.h.