Get the enable or disable status of the AHB3 peripheral clock. More...

Defines
#define	__HAL_RCC_FMC_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) != RESET)
#define	__HAL_RCC_FMC_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) == RESET)
#define	__HAL_RCC_QSPI_IS_CLK_ENABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)
#define	__HAL_RCC_QSPI_IS_CLK_DISABLED() ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)

Detailed Description

Get the enable or disable status of the AHB3 peripheral clock.

Note:: After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_FMC_IS_CLK_DISABLED ( ) ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) == RESET)

Definition at line 1300 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_FMC_IS_CLK_ENABLED ( ) ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) != RESET)

Definition at line 1299 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_QSPI_IS_CLK_DISABLED ( ) ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)

Definition at line 1303 of file stm32f4xx_hal_rcc_ex.h.

#define __HAL_RCC_QSPI_IS_CLK_ENABLED ( ) ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)

Definition at line 1302 of file stm32f4xx_hal_rcc_ex.h.