AHB3

Functions
__STATIC_INLINE void	LL_AHB3_GRP1_EnableClock (uint32_t Periphs)
	Enable AHB3 peripherals clock.
__STATIC_INLINE uint32_t	LL_AHB3_GRP1_IsEnabledClock (uint32_t Periphs)
	Check if AHB3 peripheral clock is enabled or not.
__STATIC_INLINE void	LL_AHB3_GRP1_DisableClock (uint32_t Periphs)
	Disable AHB3 peripherals clock.
__STATIC_INLINE void	LL_AHB3_GRP1_ForceReset (uint32_t Periphs)
	Force AHB3 peripherals reset.
__STATIC_INLINE void	LL_AHB3_GRP1_ReleaseReset (uint32_t Periphs)
	Release AHB3 peripherals reset.
__STATIC_INLINE void	LL_AHB3_GRP1_EnableClockSleep (uint32_t Periphs)
	Enable AHB3 peripherals clock during Low Power (Sleep) mode.
__STATIC_INLINE void	LL_AHB3_GRP1_DisableClockSleep (uint32_t Periphs)
	Disable AHB3 peripherals clock during Low Power (Sleep) mode.

---

Function Documentation

__STATIC_INLINE void LL_AHB3_GRP1_DisableClock

(

uint32_t

Periphs

)

Disable AHB3 peripherals clock.

Reference Manual to LL API cross reference:

AHB3ENR MDMAEN LL_AHB3_GRP1_DisableClock
AHB3ENR DMA2DEN LL_AHB3_GRP1_DisableClock
AHB3ENR JPGDECEN LL_AHB3_GRP1_DisableClock
AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock
AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR OSPI1EN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR OSPI2EN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR IOMNGREN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR OTFDEC1EN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR OTFDEC2EN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR GFXMMU LL_AHB3_GRP1_DisableClock
(*) AHB3ENR SDMMC1EN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR FLASHEN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR DTCM1EN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR DTCM2EN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR ITCMEN LL_AHB3_GRP1_DisableClock
(*) AHB3ENR AXISRAMEN LL_AHB3_GRP1_DisableClock

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB3_GRP1_PERIPH_MDMA LL_AHB3_GRP1_PERIPH_DMA2D LL_AHB3_GRP1_PERIPH_JPGDEC (*) LL_AHB3_GRP1_PERIPH_FMC LL_AHB3_GRP1_PERIPH_QSPI (*) LL_AHB3_GRP1_PERIPH_OSPI1 (*) LL_AHB3_GRP1_PERIPH_OSPI2 (*) LL_AHB3_GRP1_PERIPH_OCTOSPIM (*) LL_AHB3_GRP1_PERIPH_OTFDEC1 (*) LL_AHB3_GRP1_PERIPH_OTFDEC2 (*) LL_AHB3_GRP1_PERIPH_GFXMMU (*) LL_AHB3_GRP1_PERIPH_SDMMC1 LL_AHB3_GRP1_PERIPH_FLASH (*) LL_AHB3_GRP1_PERIPH_DTCM1 (*) LL_AHB3_GRP1_PERIPH_DTCM2 (*) LL_AHB3_GRP1_PERIPH_ITCM (*) LL_AHB3_GRP1_PERIPH_AXISRAM (*) value not defined in all devices.

Return values:

None

Definition at line 664 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB3_GRP1_DisableClockSleep

(

uint32_t

Periphs

)

Disable AHB3 peripherals clock during Low Power (Sleep) mode.

Reference Manual to LL API cross reference:

AHB3LPENR MDMALPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR DMA2DLPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR JPGDECLPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR FMCLPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR QSPILPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR OSPI1LPEN LL_AHB3_GRP1_DisableClockSleep
(*) AHB3LPENR OSPI2LPEN LL_AHB3_GRP1_DisableClockSleep
(*) AHB3LPENR IOMNGRLPEN LL_AHB3_GRP1_DisableClockSleep
(*) AHB3LPENR OTFDEC1LPEN LL_AHB3_GRP1_DisableClockSleep
(*) AHB3LPENR OTFDEC1LPEN LL_AHB3_GRP1_DisableClockSleep
(*) AHB3LPENR GFXMMULPEN LL_AHB3_GRP1_DisableClockSleep
(*) AHB3LPENR SDMMC1LPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR FLASHLPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR DTCM1LPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR DTCM2LPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR ITCMLPEN LL_AHB3_GRP1_DisableClockSleep
AHB3LPENR AXISRAMLPEN LL_AHB3_GRP1_DisableClockSleep

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB3_GRP1_PERIPH_DMA2D LL_AHB3_GRP1_PERIPH_JPGDEC (*) LL_AHB3_GRP1_PERIPH_FMC LL_AHB3_GRP1_PERIPH_QSPI (*) LL_AHB3_GRP1_PERIPH_OSPI1 (*) LL_AHB3_GRP1_PERIPH_OSPI2 (*) LL_AHB3_GRP1_PERIPH_OCTOSPIM (*) LL_AHB3_GRP1_PERIPH_OTFDEC1 (*) LL_AHB3_GRP1_PERIPH_OTFDEC2 (*) LL_AHB3_GRP1_PERIPH_GFXMMU (*) LL_AHB3_GRP1_PERIPH_SDMMC1 LL_AHB3_GRP1_PERIPH_FLASH LL_AHB3_GRP1_PERIPH_DTCM1 LL_AHB3_GRP1_PERIPH_DTCM2 LL_AHB3_GRP1_PERIPH_ITCM LL_AHB3_GRP1_PERIPH_AXISRAM (*) value not defined in all devices.

Return values:

None

Definition at line 830 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB3_GRP1_EnableClock

(

uint32_t

Periphs

)

Enable AHB3 peripherals clock.

Reference Manual to LL API cross reference:

AHB3ENR MDMAEN LL_AHB3_GRP1_EnableClock
AHB3ENR DMA2DEN LL_AHB3_GRP1_EnableClock
AHB3ENR JPGDECEN LL_AHB3_GRP1_EnableClock
AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock
AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR OSPI1EN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR OSPI2EN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR IOMNGREN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR OTFDEC1EN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR OTFDEC2EN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR GFXMMU LL_AHB3_GRP1_EnableClock
(*) AHB3ENR SDMMC1EN LL_AHB3_GRP1_EnableClock
AHB3ENR FLASHEN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR DTCM1EN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR DTCM2EN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR ITCMEN LL_AHB3_GRP1_EnableClock
(*) AHB3ENR AXISRAMEN LL_AHB3_GRP1_EnableClock (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB3_GRP1_PERIPH_MDMA LL_AHB3_GRP1_PERIPH_DMA2D LL_AHB3_GRP1_PERIPH_JPGDEC (*) LL_AHB3_GRP1_PERIPH_FMC LL_AHB3_GRP1_PERIPH_QSPI (*) LL_AHB3_GRP1_PERIPH_OSPI1 (*) LL_AHB3_GRP1_PERIPH_OSPI2 (*) LL_AHB3_GRP1_PERIPH_OCTOSPIM (*) LL_AHB3_GRP1_PERIPH_OTFDEC1 (*) LL_AHB3_GRP1_PERIPH_OTFDEC2 (*) LL_AHB3_GRP1_PERIPH_GFXMMU (*) LL_AHB3_GRP1_PERIPH_SDMMC1 LL_AHB3_GRP1_PERIPH_FLASH (*) LL_AHB3_GRP1_PERIPH_DTCM1 (*) LL_AHB3_GRP1_PERIPH_DTCM2 (*) LL_AHB3_GRP1_PERIPH_ITCM (*) LL_AHB3_GRP1_PERIPH_AXISRAM (*) value not defined in all devices.

Return values:

None

Definition at line 568 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB3_GRP1_EnableClockSleep

(

uint32_t

Periphs

)

Enable AHB3 peripherals clock during Low Power (Sleep) mode.

Reference Manual to LL API cross reference:

AHB3LPENR MDMALPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR DMA2DLPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR JPGDECLPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR FMCLPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR QSPILPEN LL_AHB3_GRP1_EnableClockSleep
(*) AHB3LPENR OSPI1LPEN LL_AHB3_GRP1_EnableClockSleep
(*) AHB3LPENR OSPI2LPEN LL_AHB3_GRP1_EnableClockSleep
(*) AHB3LPENR IOMNGRLPEN LL_AHB3_GRP1_EnableClockSleep
(*) AHB3LPENR OTFDEC1LPEN LL_AHB3_GRP1_EnableClockSleep
(*) AHB3LPENR OTFDEC1LPEN LL_AHB3_GRP1_EnableClockSleep
(*) AHB3LPENR GFXMMULPEN LL_AHB3_GRP1_EnableClockSleep
(*) AHB3LPENR SDMMC1LPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR FLASHLPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR DTCM1LPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR DTCM2LPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR ITCMLPEN LL_AHB3_GRP1_EnableClockSleep
AHB3LPENR AXISRAMLPEN LL_AHB3_GRP1_EnableClockSleep

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB3_GRP1_PERIPH_DMA2D LL_AHB3_GRP1_PERIPH_JPGDEC (*) LL_AHB3_GRP1_PERIPH_FMC LL_AHB3_GRP1_PERIPH_QSPI (*) LL_AHB3_GRP1_PERIPH_OSPI1 (*) LL_AHB3_GRP1_PERIPH_OSPI2 (*) LL_AHB3_GRP1_PERIPH_OCTOSPIM (*) LL_AHB3_GRP1_PERIPH_OTFDEC1 (*) LL_AHB3_GRP1_PERIPH_OTFDEC2 (*) LL_AHB3_GRP1_PERIPH_GFXMMU (*) LL_AHB3_GRP1_PERIPH_SDMMC1 LL_AHB3_GRP1_PERIPH_FLASH LL_AHB3_GRP1_PERIPH_DTCM1 LL_AHB3_GRP1_PERIPH_DTCM2 LL_AHB3_GRP1_PERIPH_ITCM LL_AHB3_GRP1_PERIPH_AXISRAM (*) value not defined in all devices.

Return values:

None

Definition at line 781 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB3_GRP1_ForceReset

(

uint32_t

Periphs

)

Force AHB3 peripherals reset.

Reference Manual to LL API cross reference:

AHB3RSTR MDMARST LL_AHB3_GRP1_ForceReset
AHB3RSTR DMA2DRST LL_AHB3_GRP1_ForceReset
AHB3RSTR JPGDECRST LL_AHB3_GRP1_ForceReset
AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset
AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset
(*) AHB3RSTR OSPI1RST LL_AHB3_GRP1_ForceReset
(*) AHB3RSTR OSPI2RST LL_AHB3_GRP1_ForceReset
(*) AHB3RSTR IOMNGRRST LL_AHB3_GRP1_ForceReset
(*) AHB3RSTR OTFDEC1RST LL_AHB3_GRP1_ForceReset
(*) AHB3RSTR OTFDEC2RST LL_AHB3_GRP1_ForceReset
(*) AHB3RSTR GFXMMURST LL_AHB3_GRP1_ForceReset
(*) AHB3RSTR SDMMC1RST LL_AHB3_GRP1_ForceReset

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB3_GRP1_PERIPH_MDMA LL_AHB3_GRP1_PERIPH_DMA2D LL_AHB3_GRP1_PERIPH_JPGDEC (*) LL_AHB3_GRP1_PERIPH_FMC LL_AHB3_GRP1_PERIPH_QSPI (*) LL_AHB3_GRP1_PERIPH_OSPI1 (*) LL_AHB3_GRP1_PERIPH_OSPI2 (*) LL_AHB3_GRP1_PERIPH_OCTOSPIM (*) LL_AHB3_GRP1_PERIPH_OTFDEC1 (*) LL_AHB3_GRP1_PERIPH_OTFDEC2 (*) LL_AHB3_GRP1_PERIPH_GFXMMU (*) LL_AHB3_GRP1_PERIPH_SDMMC1 (*) value not defined in all devices.

Return values:

None

Definition at line 700 of file stm32h7xx_ll_bus.h.

Referenced by LL_DMA2D_DeInit(), and LL_MDMA_DeInit().

__STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock

(

uint32_t

Periphs

)

Check if AHB3 peripheral clock is enabled or not.

Reference Manual to LL API cross reference:

AHB3ENR MDMAEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR DMA2DEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR JPGDECEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR OSPI1EN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR OSPI2EN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR IOMNGREN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR OTFDEC1EN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR OTFDEC2EN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR GFXMMU LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR SDMMC1EN LL_AHB3_GRP1_IsEnabledClock
AHB3ENR FLASHEN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR DTCM1EN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR DTCM2EN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR ITCMEN LL_AHB3_GRP1_IsEnabledClock
(*) AHB3ENR AXISRAMEN LL_AHB3_GRP1_IsEnabledClock (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB3_GRP1_PERIPH_MDMA LL_AHB3_GRP1_PERIPH_DMA2D LL_AHB3_GRP1_PERIPH_JPGDEC (*) LL_AHB3_GRP1_PERIPH_FMC LL_AHB3_GRP1_PERIPH_QSPI (*) LL_AHB3_GRP1_PERIPH_OSPI1 (*) LL_AHB3_GRP1_PERIPH_OSPI2 (*) LL_AHB3_GRP1_PERIPH_OCTOSPIM (*) LL_AHB3_GRP1_PERIPH_OTFDEC1 (*) LL_AHB3_GRP1_PERIPH_OTFDEC2 (*) LL_AHB3_GRP1_PERIPH_GFXMMU (*) LL_AHB3_GRP1_PERIPH_SDMMC1 LL_AHB3_GRP1_PERIPH_FLASH (*) LL_AHB3_GRP1_PERIPH_DTCM1 (*) LL_AHB3_GRP1_PERIPH_DTCM2 (*) LL_AHB3_GRP1_PERIPH_ITCM (*) LL_AHB3_GRP1_PERIPH_AXISRAM (*) value not defined in all devices.

Return values:

uint32_t

Definition at line 618 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset

(

uint32_t

Periphs

)

Release AHB3 peripherals reset.

Reference Manual to LL API cross reference:

AHB3RSTR MDMARST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR DMA2DRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR JPGDECRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset
AHB3RSTR OSPI1RST LL_AHB3_GRP1_ReleaseReset
(*) AHB3RSTR OSPI2RST LL_AHB3_GRP1_ReleaseReset
(*) AHB3RSTR IOMNGRRST LL_AHB3_GRP1_ReleaseReset
(*) AHB3RSTR OTFDEC1RST LL_AHB3_GRP1_ReleaseReset
(*) AHB3RSTR OTFDEC2RST LL_AHB3_GRP1_ReleaseReset
(*) AHB3RSTR GFXMMURST LL_AHB3_GRP1_ReleaseReset
(*) AHB3RSTR SDMMC1RST LL_AHB3_GRP1_ReleaseReset

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB3_GRP1_PERIPH_MDMA LL_AHB3_GRP1_PERIPH_DMA2D LL_AHB3_GRP1_PERIPH_JPGDEC (*) LL_AHB3_GRP1_PERIPH_FMC LL_AHB3_GRP1_PERIPH_QSPI (*) LL_AHB3_GRP1_PERIPH_OSPI1 (*) LL_AHB3_GRP1_PERIPH_OSPI2 (*) LL_AHB3_GRP1_PERIPH_OCTOSPIM (*) LL_AHB3_GRP1_PERIPH_OTFDEC1 (*) LL_AHB3_GRP1_PERIPH_OTFDEC2 (*) LL_AHB3_GRP1_PERIPH_GFXMMU (*) LL_AHB3_GRP1_PERIPH_SDMMC1 (*) value not defined in all devices.

Return values:

None

Definition at line 736 of file stm32h7xx_ll_bus.h.

Referenced by LL_DMA2D_DeInit(), and LL_MDMA_DeInit().