STM32H735xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32h7xx_ll_usart.c 00004 * @author MCD Application Team 00005 * @brief USART LL module driver. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 #if defined(USE_FULL_LL_DRIVER) 00019 00020 /* Includes ------------------------------------------------------------------*/ 00021 #include "stm32h7xx_ll_usart.h" 00022 #include "stm32h7xx_ll_rcc.h" 00023 #include "stm32h7xx_ll_bus.h" 00024 #ifdef USE_FULL_ASSERT 00025 #include "stm32_assert.h" 00026 #else 00027 #define assert_param(expr) ((void)0U) 00028 #endif /* USE_FULL_ASSERT */ 00029 00030 /** @addtogroup STM32H7xx_LL_Driver 00031 * @{ 00032 */ 00033 00034 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (USART10) 00035 00036 /** @addtogroup USART_LL 00037 * @{ 00038 */ 00039 00040 /* Private types -------------------------------------------------------------*/ 00041 /* Private variables ---------------------------------------------------------*/ 00042 /* Private constants ---------------------------------------------------------*/ 00043 /* Private macros ------------------------------------------------------------*/ 00044 /** @addtogroup USART_LL_Private_Macros 00045 * @{ 00046 */ 00047 00048 #define IS_LL_USART_PRESCALER(__VALUE__) (((__VALUE__) == LL_USART_PRESCALER_DIV1) \ 00049 || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \ 00050 || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \ 00051 || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \ 00052 || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \ 00053 || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \ 00054 || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \ 00055 || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \ 00056 || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \ 00057 || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \ 00058 || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \ 00059 || ((__VALUE__) == LL_USART_PRESCALER_DIV256)) 00060 00061 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available 00062 * divided by the smallest oversampling used on the USART (i.e. 8) */ 00063 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 12500000U) 00064 00065 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */ 00066 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U) 00067 00068 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \ 00069 || ((__VALUE__) == LL_USART_DIRECTION_RX) \ 00070 || ((__VALUE__) == LL_USART_DIRECTION_TX) \ 00071 || ((__VALUE__) == LL_USART_DIRECTION_TX_RX)) 00072 00073 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \ 00074 || ((__VALUE__) == LL_USART_PARITY_EVEN) \ 00075 || ((__VALUE__) == LL_USART_PARITY_ODD)) 00076 00077 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \ 00078 || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \ 00079 || ((__VALUE__) == LL_USART_DATAWIDTH_9B)) 00080 00081 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \ 00082 || ((__VALUE__) == LL_USART_OVERSAMPLING_8)) 00083 00084 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \ 00085 || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT)) 00086 00087 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \ 00088 || ((__VALUE__) == LL_USART_PHASE_2EDGE)) 00089 00090 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \ 00091 || ((__VALUE__) == LL_USART_POLARITY_HIGH)) 00092 00093 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \ 00094 || ((__VALUE__) == LL_USART_CLOCK_ENABLE)) 00095 00096 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \ 00097 || ((__VALUE__) == LL_USART_STOPBITS_1) \ 00098 || ((__VALUE__) == LL_USART_STOPBITS_1_5) \ 00099 || ((__VALUE__) == LL_USART_STOPBITS_2)) 00100 00101 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \ 00102 || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \ 00103 || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \ 00104 || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS)) 00105 00106 /** 00107 * @} 00108 */ 00109 00110 /* Private function prototypes -----------------------------------------------*/ 00111 00112 /* Exported functions --------------------------------------------------------*/ 00113 /** @addtogroup USART_LL_Exported_Functions 00114 * @{ 00115 */ 00116 00117 /** @addtogroup USART_LL_EF_Init 00118 * @{ 00119 */ 00120 00121 /** 00122 * @brief De-initialize USART registers (Registers restored to their default values). 00123 * @param USARTx USART Instance 00124 * @retval An ErrorStatus enumeration value: 00125 * - SUCCESS: USART registers are de-initialized 00126 * - ERROR: USART registers are not de-initialized 00127 */ 00128 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx) 00129 { 00130 ErrorStatus status = SUCCESS; 00131 00132 /* Check the parameters */ 00133 assert_param(IS_UART_INSTANCE(USARTx)); 00134 00135 if (USARTx == USART1) 00136 { 00137 /* Force reset of USART clock */ 00138 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1); 00139 00140 /* Release reset of USART clock */ 00141 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1); 00142 } 00143 else if (USARTx == USART2) 00144 { 00145 /* Force reset of USART clock */ 00146 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2); 00147 00148 /* Release reset of USART clock */ 00149 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2); 00150 } 00151 else if (USARTx == USART3) 00152 { 00153 /* Force reset of USART clock */ 00154 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3); 00155 00156 /* Release reset of USART clock */ 00157 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3); 00158 } 00159 else if (USARTx == UART4) 00160 { 00161 /* Force reset of UART clock */ 00162 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4); 00163 00164 /* Release reset of UART clock */ 00165 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4); 00166 } 00167 else if (USARTx == UART5) 00168 { 00169 /* Force reset of UART clock */ 00170 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5); 00171 00172 /* Release reset of UART clock */ 00173 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5); 00174 } 00175 else if (USARTx == USART6) 00176 { 00177 /* Force reset of USART clock */ 00178 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6); 00179 00180 /* Release reset of USART clock */ 00181 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6); 00182 } 00183 else if (USARTx == UART7) 00184 { 00185 /* Force reset of UART clock */ 00186 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7); 00187 00188 /* Release reset of UART clock */ 00189 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7); 00190 } 00191 else if (USARTx == UART8) 00192 { 00193 /* Force reset of UART clock */ 00194 LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8); 00195 00196 /* Release reset of UART clock */ 00197 LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8); 00198 } 00199 #if defined(UART9) 00200 else if (USARTx == UART9) 00201 { 00202 /* Force reset of UART clock */ 00203 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9); 00204 00205 /* Release reset of UART clock */ 00206 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9); 00207 } 00208 #endif /* UART9 */ 00209 #if defined(USART10) 00210 else if (USARTx == USART10) 00211 { 00212 /* Force reset of USART clock */ 00213 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART10); 00214 00215 /* Release reset of USART clock */ 00216 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART10); 00217 } 00218 #endif /* USART10 */ 00219 else 00220 { 00221 status = ERROR; 00222 } 00223 00224 return (status); 00225 } 00226 00227 /** 00228 * @brief Initialize USART registers according to the specified 00229 * parameters in USART_InitStruct. 00230 * @note As some bits in USART configuration registers can only be written when 00231 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling 00232 * this function. Otherwise, ERROR result will be returned. 00233 * @note Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0). 00234 * @param USARTx USART Instance 00235 * @param USART_InitStruct pointer to a LL_USART_InitTypeDef structure 00236 * that contains the configuration information for the specified USART peripheral. 00237 * @retval An ErrorStatus enumeration value: 00238 * - SUCCESS: USART registers are initialized according to USART_InitStruct content 00239 * - ERROR: Problem occurred during USART Registers initialization 00240 */ 00241 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct) 00242 { 00243 ErrorStatus status = ERROR; 00244 uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO; 00245 00246 /* Check the parameters */ 00247 assert_param(IS_UART_INSTANCE(USARTx)); 00248 assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue)); 00249 assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate)); 00250 assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth)); 00251 assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits)); 00252 assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity)); 00253 assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection)); 00254 assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl)); 00255 assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling)); 00256 00257 /* USART needs to be in disabled state, in order to be able to configure some bits in 00258 CRx registers */ 00259 if (LL_USART_IsEnabled(USARTx) == 0U) 00260 { 00261 /*---------------------------- USART CR1 Configuration --------------------- 00262 * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters: 00263 * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value 00264 * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value 00265 * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value 00266 * - Oversampling: USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value. 00267 */ 00268 MODIFY_REG(USARTx->CR1, 00269 (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | 00270 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), 00271 (USART_InitStruct->DataWidth | USART_InitStruct->Parity | 00272 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling)); 00273 00274 /*---------------------------- USART CR2 Configuration --------------------- 00275 * Configure USARTx CR2 (Stop bits) with parameters: 00276 * - Stop Bits: USART_CR2_STOP bits according to USART_InitStruct->StopBits value. 00277 * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit(). 00278 */ 00279 LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits); 00280 00281 /*---------------------------- USART CR3 Configuration --------------------- 00282 * Configure USARTx CR3 (Hardware Flow Control) with parameters: 00283 * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to 00284 * USART_InitStruct->HardwareFlowControl value. 00285 */ 00286 LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl); 00287 00288 /*---------------------------- USART BRR Configuration --------------------- 00289 * Retrieve Clock frequency used for USART Peripheral 00290 */ 00291 if (USARTx == USART1) 00292 { 00293 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART16_CLKSOURCE); 00294 } 00295 else if (USARTx == USART2) 00296 { 00297 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART234578_CLKSOURCE); 00298 } 00299 else if (USARTx == USART3) 00300 { 00301 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART234578_CLKSOURCE); 00302 } 00303 else if (USARTx == UART4) 00304 { 00305 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART234578_CLKSOURCE); 00306 } 00307 else if (USARTx == UART5) 00308 { 00309 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART234578_CLKSOURCE); 00310 } 00311 else if (USARTx == USART6) 00312 { 00313 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART16_CLKSOURCE); 00314 } 00315 else if (USARTx == UART7) 00316 { 00317 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART234578_CLKSOURCE); 00318 } 00319 else if (USARTx == UART8) 00320 { 00321 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART234578_CLKSOURCE); 00322 } 00323 #if defined(UART9) 00324 else if (USARTx == UART9) 00325 { 00326 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART16_CLKSOURCE); 00327 } 00328 #endif /* UART9 */ 00329 #if defined(USART10) 00330 else if (USARTx == USART10) 00331 { 00332 periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART16_CLKSOURCE); 00333 } 00334 #endif /* USART10 */ 00335 else 00336 { 00337 /* Nothing to do, as error code is already assigned to ERROR value */ 00338 } 00339 00340 /* Configure the USART Baud Rate : 00341 - prescaler value is required 00342 - valid baud rate value (different from 0) is required 00343 - Peripheral clock as returned by RCC service, should be valid (different from 0). 00344 */ 00345 if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO) 00346 && (USART_InitStruct->BaudRate != 0U)) 00347 { 00348 status = SUCCESS; 00349 LL_USART_SetBaudRate(USARTx, 00350 periphclk, 00351 USART_InitStruct->PrescalerValue, 00352 USART_InitStruct->OverSampling, 00353 USART_InitStruct->BaudRate); 00354 00355 /* Check BRR is greater than or equal to 16d */ 00356 assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR)); 00357 } 00358 00359 /*---------------------------- USART PRESC Configuration ----------------------- 00360 * Configure USARTx PRESC (Prescaler) with parameters: 00361 * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value. 00362 */ 00363 LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue); 00364 } 00365 /* Endif (=> USART not in Disabled state => return ERROR) */ 00366 00367 return (status); 00368 } 00369 00370 /** 00371 * @brief Set each @ref LL_USART_InitTypeDef field to default value. 00372 * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure 00373 * whose fields will be set to default values. 00374 * @retval None 00375 */ 00376 00377 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct) 00378 { 00379 /* Set USART_InitStruct fields to default values */ 00380 USART_InitStruct->PrescalerValue = LL_USART_PRESCALER_DIV1; 00381 USART_InitStruct->BaudRate = 9600U; 00382 USART_InitStruct->DataWidth = LL_USART_DATAWIDTH_8B; 00383 USART_InitStruct->StopBits = LL_USART_STOPBITS_1; 00384 USART_InitStruct->Parity = LL_USART_PARITY_NONE ; 00385 USART_InitStruct->TransferDirection = LL_USART_DIRECTION_TX_RX; 00386 USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE; 00387 USART_InitStruct->OverSampling = LL_USART_OVERSAMPLING_16; 00388 } 00389 00390 /** 00391 * @brief Initialize USART Clock related settings according to the 00392 * specified parameters in the USART_ClockInitStruct. 00393 * @note As some bits in USART configuration registers can only be written when 00394 * the USART is disabled (USART_CR1_UE bit =0), USART Peripheral should be in disabled state prior calling 00395 * this function. Otherwise, ERROR result will be returned. 00396 * @param USARTx USART Instance 00397 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure 00398 * that contains the Clock configuration information for the specified USART peripheral. 00399 * @retval An ErrorStatus enumeration value: 00400 * - SUCCESS: USART registers related to Clock settings are initialized according 00401 * to USART_ClockInitStruct content 00402 * - ERROR: Problem occurred during USART Registers initialization 00403 */ 00404 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct) 00405 { 00406 ErrorStatus status = SUCCESS; 00407 00408 /* Check USART Instance and Clock signal output parameters */ 00409 assert_param(IS_UART_INSTANCE(USARTx)); 00410 assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput)); 00411 00412 /* USART needs to be in disabled state, in order to be able to configure some bits in 00413 CRx registers */ 00414 if (LL_USART_IsEnabled(USARTx) == 0U) 00415 { 00416 /* Ensure USART instance is USART capable */ 00417 assert_param(IS_USART_INSTANCE(USARTx)); 00418 00419 /* Check clock related parameters */ 00420 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); 00421 assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase)); 00422 assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse)); 00423 00424 /*---------------------------- USART CR2 Configuration ----------------------- 00425 * Configure USARTx CR2 (Clock signal related bits) with parameters: 00426 * - Clock Output: USART_CR2_CLKEN bit according to USART_ClockInitStruct->ClockOutput value 00427 * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value 00428 * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value 00429 * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value. 00430 */ 00431 MODIFY_REG(USARTx->CR2, 00432 USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, 00433 USART_ClockInitStruct->ClockOutput | USART_ClockInitStruct->ClockPolarity | 00434 USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse); 00435 } 00436 /* Else (USART not in Disabled state => return ERROR */ 00437 else 00438 { 00439 status = ERROR; 00440 } 00441 00442 return (status); 00443 } 00444 00445 /** 00446 * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value. 00447 * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure 00448 * whose fields will be set to default values. 00449 * @retval None 00450 */ 00451 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) 00452 { 00453 /* Set LL_USART_ClockInitStruct fields with default values */ 00454 USART_ClockInitStruct->ClockOutput = LL_USART_CLOCK_DISABLE; 00455 USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when ClockOutput = 00456 LL_USART_CLOCK_DISABLE */ 00457 USART_ClockInitStruct->ClockPhase = LL_USART_PHASE_1EDGE; /* Not relevant when ClockOutput = 00458 LL_USART_CLOCK_DISABLE */ 00459 USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT; /* Not relevant when ClockOutput = 00460 LL_USART_CLOCK_DISABLE */ 00461 } 00462 00463 /** 00464 * @} 00465 */ 00466 00467 /** 00468 * @} 00469 */ 00470 00471 /** 00472 * @} 00473 */ 00474 00475 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || USART10 */ 00476 00477 /** 00478 * @} 00479 */ 00480 00481 #endif /* USE_FULL_LL_DRIVER */ 00482 00483