AHB1 Peripheral Clock Enable Disable

Enable or disable the AHB1 peripheral clock. More...

Defines
#define	__HAL_RCC_DMA1_CLK_ENABLE()
#define	__HAL_RCC_DMA2_CLK_ENABLE()
#define	__HAL_RCC_FLASH_CLK_ENABLE()
#define	__HAL_RCC_CRC_CLK_ENABLE()
#define	__HAL_RCC_TSC_CLK_ENABLE()
#define	__HAL_RCC_DMA1_CLK_DISABLE()   CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN)
#define	__HAL_RCC_DMA2_CLK_DISABLE()   CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN)
#define	__HAL_RCC_FLASH_CLK_DISABLE()   CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN)
#define	__HAL_RCC_CRC_CLK_DISABLE()   CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)
#define	__HAL_RCC_TSC_CLK_DISABLE()   CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN)

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Detailed Description

Enable or disable the AHB1 peripheral clock.

Note:

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

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Define Documentation

#define __HAL_RCC_CRC_CLK_DISABLE

(

)

CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN)

Definition at line 718 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_CRC_CLK_ENABLE

(

)

Value:

do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 671 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DMA1_CLK_DISABLE

(

)

CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN)

Definition at line 708 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DMA1_CLK_ENABLE

(

)

Value:

do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 637 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DMA2_CLK_DISABLE

(

)

CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN)

Definition at line 710 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DMA2_CLK_ENABLE

(

)

Value:

do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 645 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_FLASH_CLK_DISABLE

(

)

CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN)

Definition at line 716 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_FLASH_CLK_ENABLE

(

)

Value:

do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 663 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TSC_CLK_DISABLE

(

)

CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN)

Definition at line 720 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TSC_CLK_ENABLE

(

)

Value:

do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 679 of file stm32l4xx_hal_rcc.h.