AHB3 Peripheral Clock Enable Disable

Enable or disable the AHB3 peripheral clock. More...

Defines
#define	__HAL_RCC_QSPI_CLK_ENABLE()
#define	__HAL_RCC_QSPI_CLK_DISABLE()   CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN)

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Detailed Description

Enable or disable the AHB3 peripheral clock.

Note:

After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

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Define Documentation

#define __HAL_RCC_QSPI_CLK_DISABLE

(

)

CLEAR_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN)

Definition at line 1042 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_QSPI_CLK_ENABLE

(

)

Value:

do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1008 of file stm32l4xx_hal_rcc.h.