STM32L443xx HAL User Manual
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Enable or disable the APB2 peripheral clock. More...
Defines | |
#define | __HAL_RCC_SYSCFG_CLK_ENABLE() |
#define | __HAL_RCC_FIREWALL_CLK_ENABLE() |
#define | __HAL_RCC_SDMMC1_CLK_ENABLE() |
#define | __HAL_RCC_TIM1_CLK_ENABLE() |
#define | __HAL_RCC_SPI1_CLK_ENABLE() |
#define | __HAL_RCC_USART1_CLK_ENABLE() |
#define | __HAL_RCC_TIM15_CLK_ENABLE() |
#define | __HAL_RCC_TIM16_CLK_ENABLE() |
#define | __HAL_RCC_SAI1_CLK_ENABLE() |
#define | __HAL_RCC_SYSCFG_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) |
#define | __HAL_RCC_SDMMC1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) |
#define | __HAL_RCC_TIM1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) |
#define | __HAL_RCC_SPI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) |
#define | __HAL_RCC_USART1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) |
#define | __HAL_RCC_TIM15_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) |
#define | __HAL_RCC_TIM16_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) |
#define | __HAL_RCC_SAI1_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) |
Enable or disable the APB2 peripheral clock.
#define __HAL_RCC_FIREWALL_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_FWEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1460 of file stm32l4xx_hal_rcc.h.
Referenced by HAL_FIREWALL_Config(), and HAL_FIREWALL_GetConfig().
#define __HAL_RCC_SAI1_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN) |
Definition at line 1615 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SAI1_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SAI1EN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1540 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SDMMC1_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN) |
Definition at line 1593 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SDMMC1_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SDMMC1EN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1469 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SPI1_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN) |
Definition at line 1598 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SPI1_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1486 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SYSCFG_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN) |
Definition at line 1590 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_SYSCFG_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SYSCFGEN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1452 of file stm32l4xx_hal_rcc.h.
Referenced by HAL_COMP_Init(), HAL_GPIO_Init(), HAL_I2CEx_DisableFastModePlus(), HAL_I2CEx_EnableFastModePlus(), HAL_SMBUSEx_DisableFastModePlus(), and HAL_SMBUSEx_EnableFastModePlus().
#define __HAL_RCC_TIM15_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN) |
Definition at line 1606 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM15_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM15EN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1513 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM16_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN) |
Definition at line 1608 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM16_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM16EN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1521 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM1_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN) |
Definition at line 1596 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_TIM1_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1478 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USART1_CLK_DISABLE | ( | ) | CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN) |
Definition at line 1604 of file stm32l4xx_hal_rcc.h.
#define __HAL_RCC_USART1_CLK_ENABLE | ( | ) |
do { \ __IO uint32_t tmpreg; \ SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \ /* Delay after an RCC peripheral clock enabling */ \ tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN); \ UNUSED(tmpreg); \ } while(0)
Definition at line 1504 of file stm32l4xx_hal_rcc.h.