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STM32L443xx HAL User Manual
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TIM Peripheral Control functions. More...
Functions | |
| HAL_StatusTypeDef | HAL_TIM_OC_ConfigChannel (TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel) |
| Initializes the TIM Output Compare Channels according to the specified parameters in the TIM_OC_InitTypeDef. | |
| HAL_StatusTypeDef | HAL_TIM_IC_ConfigChannel (TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel) |
| Initializes the TIM Input Capture Channels according to the specified parameters in the TIM_IC_InitTypeDef. | |
| HAL_StatusTypeDef | HAL_TIM_PWM_ConfigChannel (TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel) |
| Initializes the TIM PWM channels according to the specified parameters in the TIM_OC_InitTypeDef. | |
| HAL_StatusTypeDef | HAL_TIM_OnePulse_ConfigChannel (TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig, uint32_t OutputChannel, uint32_t InputChannel) |
| Initializes the TIM One Pulse Channels according to the specified parameters in the TIM_OnePulse_InitTypeDef. | |
| HAL_StatusTypeDef | HAL_TIM_DMABurst_WriteStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength) |
| Configure the DMA Burst to transfer Data from the memory to the TIM peripheral. | |
| HAL_StatusTypeDef | HAL_TIM_DMABurst_MultiWriteStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength) |
| Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral. | |
| HAL_StatusTypeDef | HAL_TIM_DMABurst_WriteStop (TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) |
| Stops the TIM DMA Burst mode. | |
| HAL_StatusTypeDef | HAL_TIM_DMABurst_ReadStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength) |
| Configure the DMA Burst to transfer Data from the TIM peripheral to the memory. | |
| HAL_StatusTypeDef | HAL_TIM_DMABurst_MultiReadStart (TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength) |
| Configure the DMA Burst to transfer Data from the TIM peripheral to the memory. | |
| HAL_StatusTypeDef | HAL_TIM_DMABurst_ReadStop (TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) |
| Stop the DMA burst reading. | |
| HAL_StatusTypeDef | HAL_TIM_GenerateEvent (TIM_HandleTypeDef *htim, uint32_t EventSource) |
| Generate a software event. | |
| HAL_StatusTypeDef | HAL_TIM_ConfigOCrefClear (TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef *sClearInputConfig, uint32_t Channel) |
| Configures the OCRef clear feature. | |
| HAL_StatusTypeDef | HAL_TIM_ConfigClockSource (TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) |
| Configures the clock source to be used. | |
| HAL_StatusTypeDef | HAL_TIM_ConfigTI1Input (TIM_HandleTypeDef *htim, uint32_t TI1_Selection) |
| Selects the signal connected to the TI1 input: direct from CH1_input or a XOR combination between CH1_input, CH2_input & CH3_input. | |
| HAL_StatusTypeDef | HAL_TIM_SlaveConfigSynchro (TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig) |
| Configures the TIM in Slave mode. | |
| HAL_StatusTypeDef | HAL_TIM_SlaveConfigSynchro_IT (TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig) |
| Configures the TIM in Slave mode in interrupt mode. | |
| uint32_t | HAL_TIM_ReadCapturedValue (TIM_HandleTypeDef *htim, uint32_t Channel) |
| Read the captured value from Capture Compare unit. | |
TIM Peripheral Control functions.
Peripheral Control functions.
==============================================================================
##### Peripheral Control functions #####
==============================================================================
[..]
This section provides functions allowing to:
(+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode.
(+) Configure External Clock source.
(+) Configure Complementary channels, break features and dead time.
(+) Configure Master and the Slave synchronization.
(+) Configure the DMA Burst Mode.
| HAL_StatusTypeDef HAL_TIM_ConfigClockSource | ( | TIM_HandleTypeDef * | htim, |
| TIM_ClockConfigTypeDef * | sClockSourceConfig | ||
| ) |
Configures the clock source to be used.
| htim | TIM handle |
| sClockSourceConfig | pointer to a TIM_ClockConfigTypeDef structure that contains the clock source information for the TIM peripheral. |
| HAL | status |
Definition at line 5438 of file stm32l4xx_hal_tim.c.
References assert_param, TIM_ClockConfigTypeDef::ClockFilter, TIM_ClockConfigTypeDef::ClockPolarity, TIM_ClockConfigTypeDef::ClockPrescaler, TIM_ClockConfigTypeDef::ClockSource, HAL_TIM_STATE_BUSY, HAL_TIM_STATE_READY, __TIM_HandleTypeDef::Instance, IS_TIM_CLOCKFILTER, IS_TIM_CLOCKPOLARITY, IS_TIM_CLOCKPRESCALER, IS_TIM_CLOCKSOURCE, __TIM_HandleTypeDef::State, TIM_CLOCKSOURCE_ETRMODE1, TIM_CLOCKSOURCE_ETRMODE2, TIM_CLOCKSOURCE_INTERNAL, TIM_CLOCKSOURCE_ITR0, TIM_CLOCKSOURCE_ITR1, TIM_CLOCKSOURCE_ITR2, TIM_CLOCKSOURCE_ITR3, TIM_CLOCKSOURCE_TI1, TIM_CLOCKSOURCE_TI1ED, TIM_CLOCKSOURCE_TI2, TIM_ETR_SetConfig(), TIM_ITRx_SetConfig(), TIM_SLAVEMODE_EXTERNAL1, TIM_TI1_ConfigInputStage(), and TIM_TI2_ConfigInputStage().
| HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear | ( | TIM_HandleTypeDef * | htim, |
| TIM_ClearInputConfigTypeDef * | sClearInputConfig, | ||
| uint32_t | Channel | ||
| ) |
Configures the OCRef clear feature.
| htim | TIM handle |
| sClearInputConfig | pointer to a TIM_ClearInputConfigTypeDef structure that contains the OCREF clear feature and parameters for the TIM peripheral. |
| Channel | specifies the TIM Channel This parameter can be one of the following values:
|
| HAL | status |
Definition at line 5271 of file stm32l4xx_hal_tim.c.
References assert_param, TIM_ClearInputConfigTypeDef::ClearInputFilter, TIM_ClearInputConfigTypeDef::ClearInputPolarity, TIM_ClearInputConfigTypeDef::ClearInputPrescaler, TIM_ClearInputConfigTypeDef::ClearInputSource, TIM_ClearInputConfigTypeDef::ClearInputState, HAL_TIM_STATE_BUSY, HAL_TIM_STATE_READY, __TIM_HandleTypeDef::Instance, IS_TIM_CLEARINPUT_FILTER, IS_TIM_CLEARINPUT_POLARITY, IS_TIM_CLEARINPUT_PRESCALER, IS_TIM_CLEARINPUT_SOURCE, __TIM_HandleTypeDef::State, TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_CHANNEL_3, TIM_CHANNEL_4, TIM_CHANNEL_5, TIM_CHANNEL_6, TIM_CLEARINPUTPRESCALER_DIV1, TIM_CLEARINPUTSOURCE_ETR, TIM_CLEARINPUTSOURCE_NONE, TIM_CLEARINPUTSOURCE_OCREFCLR, and TIM_ETR_SetConfig().
| HAL_StatusTypeDef HAL_TIM_ConfigTI1Input | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | TI1_Selection | ||
| ) |
Selects the signal connected to the TI1 input: direct from CH1_input or a XOR combination between CH1_input, CH2_input & CH3_input.
| htim | TIM handle. |
| TI1_Selection | Indicate whether or not channel 1 is connected to the output of a XOR gate. This parameter can be one of the following values:
|
| HAL | status |
Definition at line 5592 of file stm32l4xx_hal_tim.c.
References assert_param, __TIM_HandleTypeDef::Instance, and IS_TIM_TI1SELECTION.
| HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | BurstBaseAddress, | ||
| uint32_t | BurstRequestSrc, | ||
| uint32_t * | BurstBuffer, | ||
| uint32_t | BurstLength, | ||
| uint32_t | DataLength | ||
| ) |
Configure the DMA Burst to transfer Data from the TIM peripheral to the memory.
| htim | TIM handle |
| BurstBaseAddress | TIM Base address from where the DMA will start the Data read This parameter can be one of the following values:
|
| BurstRequestSrc | TIM DMA Request sources This parameter can be one of the following values:
|
| BurstBuffer | The Buffer address. |
| BurstLength | DMA Burst length. This parameter can be one value between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. |
| DataLength | Data length. This parameter can be one value between 1 and 0xFFFF. |
| HAL | status |
Definition at line 4964 of file stm32l4xx_hal_tim.c.
References __HAL_TIM_ENABLE_DMA, assert_param, __TIM_HandleTypeDef::DMABurstState, HAL_DMA_BURST_STATE_BUSY, HAL_DMA_BURST_STATE_READY, HAL_DMA_Start_IT(), __TIM_HandleTypeDef::hdma, __TIM_HandleTypeDef::Instance, IS_TIM_DMA_BASE, IS_TIM_DMA_DATA_LENGTH, IS_TIM_DMA_LENGTH, IS_TIM_DMA_SOURCE, TIM_DMA_CC1, TIM_DMA_CC2, TIM_DMA_CC3, TIM_DMA_CC4, TIM_DMA_COM, TIM_DMA_ID_CC1, TIM_DMA_ID_CC2, TIM_DMA_ID_CC3, TIM_DMA_ID_CC4, TIM_DMA_ID_COMMUTATION, TIM_DMA_ID_TRIGGER, TIM_DMA_ID_UPDATE, TIM_DMA_TRIGGER, TIM_DMA_UPDATE, TIM_DMACaptureCplt(), TIM_DMACaptureHalfCplt(), TIM_DMAError(), TIM_DMAPeriodElapsedCplt(), TIM_DMAPeriodElapsedHalfCplt(), TIM_DMATriggerCplt(), TIM_DMATriggerHalfCplt(), TIMEx_DMACommutationCplt(), TIMEx_DMACommutationHalfCplt(), __DMA_HandleTypeDef::XferCpltCallback, __DMA_HandleTypeDef::XferErrorCallback, and __DMA_HandleTypeDef::XferHalfCpltCallback.
Referenced by HAL_TIM_DMABurst_ReadStart().
| HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | BurstBaseAddress, | ||
| uint32_t | BurstRequestSrc, | ||
| uint32_t * | BurstBuffer, | ||
| uint32_t | BurstLength, | ||
| uint32_t | DataLength | ||
| ) |
Configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral.
| htim | TIM handle |
| BurstBaseAddress | TIM Base address from where the DMA will start the Data write This parameter can be one of the following values:
|
| BurstRequestSrc | TIM DMA Request sources This parameter can be one of the following values:
|
| BurstBuffer | The Buffer address. |
| BurstLength | DMA Burst length. This parameter can be one value between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. |
| DataLength | Data length. This parameter can be one value between 1 and 0xFFFF. |
| HAL | status |
Definition at line 4616 of file stm32l4xx_hal_tim.c.
References __HAL_TIM_ENABLE_DMA, assert_param, __TIM_HandleTypeDef::DMABurstState, HAL_DMA_BURST_STATE_BUSY, HAL_DMA_BURST_STATE_READY, HAL_DMA_Start_IT(), __TIM_HandleTypeDef::hdma, __TIM_HandleTypeDef::Instance, IS_TIM_DMA_BASE, IS_TIM_DMA_DATA_LENGTH, IS_TIM_DMA_LENGTH, IS_TIM_DMA_SOURCE, TIM_DMA_CC1, TIM_DMA_CC2, TIM_DMA_CC3, TIM_DMA_CC4, TIM_DMA_COM, TIM_DMA_ID_CC1, TIM_DMA_ID_CC2, TIM_DMA_ID_CC3, TIM_DMA_ID_CC4, TIM_DMA_ID_COMMUTATION, TIM_DMA_ID_TRIGGER, TIM_DMA_ID_UPDATE, TIM_DMA_TRIGGER, TIM_DMA_UPDATE, TIM_DMADelayPulseCplt(), TIM_DMADelayPulseHalfCplt(), TIM_DMAError(), TIM_DMAPeriodElapsedCplt(), TIM_DMAPeriodElapsedHalfCplt(), TIM_DMATriggerCplt(), TIM_DMATriggerHalfCplt(), TIMEx_DMACommutationCplt(), TIMEx_DMACommutationHalfCplt(), __DMA_HandleTypeDef::XferCpltCallback, __DMA_HandleTypeDef::XferErrorCallback, and __DMA_HandleTypeDef::XferHalfCpltCallback.
Referenced by HAL_TIM_DMABurst_WriteStart().
| HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | BurstBaseAddress, | ||
| uint32_t | BurstRequestSrc, | ||
| uint32_t * | BurstBuffer, | ||
| uint32_t | BurstLength | ||
| ) |
Configure the DMA Burst to transfer Data from the TIM peripheral to the memory.
| htim | TIM handle |
| BurstBaseAddress | TIM Base address from where the DMA will start the Data read This parameter can be one of the following values:
|
| BurstRequestSrc | TIM DMA Request sources This parameter can be one of the following values:
|
| BurstBuffer | The Buffer address. |
| BurstLength | DMA Burst length. This parameter can be one value between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. |
| HAL | status |
Definition at line 4907 of file stm32l4xx_hal_tim.c.
References HAL_TIM_DMABurst_MultiReadStart().
| HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | BurstRequestSrc | ||
| ) |
Stop the DMA burst reading.
| htim | TIM handle |
| BurstRequestSrc | TIM DMA Request sources to disable. |
| HAL | status |
Definition at line 5148 of file stm32l4xx_hal_tim.c.
References __HAL_TIM_DISABLE_DMA, assert_param, __TIM_HandleTypeDef::DMABurstState, HAL_DMA_Abort_IT(), HAL_DMA_BURST_STATE_READY, __TIM_HandleTypeDef::hdma, IS_TIM_DMA_SOURCE, TIM_DMA_CC1, TIM_DMA_CC2, TIM_DMA_CC3, TIM_DMA_CC4, TIM_DMA_COM, TIM_DMA_ID_CC1, TIM_DMA_ID_CC2, TIM_DMA_ID_CC3, TIM_DMA_ID_CC4, TIM_DMA_ID_COMMUTATION, TIM_DMA_ID_TRIGGER, TIM_DMA_ID_UPDATE, TIM_DMA_TRIGGER, and TIM_DMA_UPDATE.
| HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | BurstBaseAddress, | ||
| uint32_t | BurstRequestSrc, | ||
| uint32_t * | BurstBuffer, | ||
| uint32_t | BurstLength | ||
| ) |
Configure the DMA Burst to transfer Data from the memory to the TIM peripheral.
| htim | TIM handle |
| BurstBaseAddress | TIM Base address from where the DMA will start the Data write This parameter can be one of the following values:
|
| BurstRequestSrc | TIM DMA Request sources This parameter can be one of the following values:
|
| BurstBuffer | The Buffer address. |
| BurstLength | DMA Burst length. This parameter can be one value between: TIM_DMABURSTLENGTH_1TRANSFER and TIM_DMABURSTLENGTH_18TRANSFERS. |
| HAL | status |
Definition at line 4558 of file stm32l4xx_hal_tim.c.
References HAL_TIM_DMABurst_MultiWriteStart().
| HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | BurstRequestSrc | ||
| ) |
Stops the TIM DMA Burst mode.
| htim | TIM handle |
| BurstRequestSrc | TIM DMA Request sources to disable |
| HAL | status |
Definition at line 4800 of file stm32l4xx_hal_tim.c.
References __HAL_TIM_DISABLE_DMA, assert_param, __TIM_HandleTypeDef::DMABurstState, HAL_DMA_Abort_IT(), HAL_DMA_BURST_STATE_READY, __TIM_HandleTypeDef::hdma, IS_TIM_DMA_SOURCE, TIM_DMA_CC1, TIM_DMA_CC2, TIM_DMA_CC3, TIM_DMA_CC4, TIM_DMA_COM, TIM_DMA_ID_CC1, TIM_DMA_ID_CC2, TIM_DMA_ID_CC3, TIM_DMA_ID_CC4, TIM_DMA_ID_COMMUTATION, TIM_DMA_ID_TRIGGER, TIM_DMA_ID_UPDATE, TIM_DMA_TRIGGER, and TIM_DMA_UPDATE.
| HAL_StatusTypeDef HAL_TIM_GenerateEvent | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | EventSource | ||
| ) |
Generate a software event.
| htim | TIM handle |
| EventSource | specifies the event source. This parameter can be one of the following values:
|
| HAL | status |
Definition at line 5232 of file stm32l4xx_hal_tim.c.
References assert_param, HAL_TIM_STATE_BUSY, HAL_TIM_STATE_READY, __TIM_HandleTypeDef::Instance, IS_TIM_EVENT_SOURCE, and __TIM_HandleTypeDef::State.
| HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel | ( | TIM_HandleTypeDef * | htim, |
| TIM_IC_InitTypeDef * | sConfig, | ||
| uint32_t | Channel | ||
| ) |
Initializes the TIM Input Capture Channels according to the specified parameters in the TIM_IC_InitTypeDef.
| htim | TIM IC handle |
| sConfig | TIM Input Capture configuration structure |
| Channel | TIM Channel to configure This parameter can be one of the following values:
|
| HAL | status |
Definition at line 4155 of file stm32l4xx_hal_tim.c.
References assert_param, TIM_IC_InitTypeDef::ICFilter, TIM_IC_InitTypeDef::ICPolarity, TIM_IC_InitTypeDef::ICPrescaler, TIM_IC_InitTypeDef::ICSelection, __TIM_HandleTypeDef::Instance, IS_TIM_IC_FILTER, IS_TIM_IC_POLARITY, IS_TIM_IC_PRESCALER, IS_TIM_IC_SELECTION, TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_CHANNEL_3, TIM_CHANNEL_4, TIM_TI1_SetConfig(), TIM_TI2_SetConfig(), TIM_TI3_SetConfig(), and TIM_TI4_SetConfig().
| HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel | ( | TIM_HandleTypeDef * | htim, |
| TIM_OC_InitTypeDef * | sConfig, | ||
| uint32_t | Channel | ||
| ) |
Initializes the TIM Output Compare Channels according to the specified parameters in the TIM_OC_InitTypeDef.
| htim | TIM Output Compare handle |
| sConfig | TIM Output Compare configuration structure |
| Channel | TIM Channels to configure This parameter can be one of the following values:
|
| HAL | status |
Definition at line 4056 of file stm32l4xx_hal_tim.c.
References assert_param, __TIM_HandleTypeDef::Instance, IS_TIM_CHANNELS, IS_TIM_OC_MODE, IS_TIM_OC_POLARITY, TIM_OC_InitTypeDef::OCMode, TIM_OC_InitTypeDef::OCPolarity, TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_CHANNEL_3, TIM_CHANNEL_4, TIM_CHANNEL_5, TIM_CHANNEL_6, TIM_OC1_SetConfig(), TIM_OC2_SetConfig(), TIM_OC3_SetConfig(), TIM_OC4_SetConfig(), TIM_OC5_SetConfig(), and TIM_OC6_SetConfig().
| HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel | ( | TIM_HandleTypeDef * | htim, |
| TIM_OnePulse_InitTypeDef * | sConfig, | ||
| uint32_t | OutputChannel, | ||
| uint32_t | InputChannel | ||
| ) |
Initializes the TIM One Pulse Channels according to the specified parameters in the TIM_OnePulse_InitTypeDef.
| htim | TIM One Pulse handle |
| sConfig | TIM One Pulse configuration structure |
| OutputChannel | TIM output channel to configure This parameter can be one of the following values:
|
| InputChannel | TIM input Channel to configure This parameter can be one of the following values:
|
| HAL | status |
Definition at line 4404 of file stm32l4xx_hal_tim.c.
References assert_param, HAL_TIM_STATE_BUSY, HAL_TIM_STATE_READY, TIM_OnePulse_InitTypeDef::ICFilter, TIM_OnePulse_InitTypeDef::ICPolarity, TIM_OnePulse_InitTypeDef::ICSelection, __TIM_HandleTypeDef::Instance, IS_TIM_OPM_CHANNELS, TIM_OC_InitTypeDef::OCIdleState, TIM_OnePulse_InitTypeDef::OCIdleState, TIM_OC_InitTypeDef::OCMode, TIM_OnePulse_InitTypeDef::OCMode, TIM_OC_InitTypeDef::OCNIdleState, TIM_OnePulse_InitTypeDef::OCNIdleState, TIM_OC_InitTypeDef::OCNPolarity, TIM_OnePulse_InitTypeDef::OCNPolarity, TIM_OC_InitTypeDef::OCPolarity, TIM_OnePulse_InitTypeDef::OCPolarity, TIM_OC_InitTypeDef::Pulse, TIM_OnePulse_InitTypeDef::Pulse, __TIM_HandleTypeDef::State, TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_OC1_SetConfig(), TIM_OC2_SetConfig(), TIM_SLAVEMODE_TRIGGER, TIM_TI1_SetConfig(), TIM_TI2_SetConfig(), TIM_TS_TI1FP1, and TIM_TS_TI2FP2.
| HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel | ( | TIM_HandleTypeDef * | htim, |
| TIM_OC_InitTypeDef * | sConfig, | ||
| uint32_t | Channel | ||
| ) |
Initializes the TIM PWM channels according to the specified parameters in the TIM_OC_InitTypeDef.
| htim | TIM PWM handle |
| sConfig | TIM PWM configuration structure |
| Channel | TIM Channels to be configured This parameter can be one of the following values:
|
| HAL | status |
Definition at line 4256 of file stm32l4xx_hal_tim.c.
References assert_param, __TIM_HandleTypeDef::Instance, IS_TIM_CHANNELS, IS_TIM_FAST_STATE, IS_TIM_OC_POLARITY, IS_TIM_PWM_MODE, TIM_OC_InitTypeDef::OCFastMode, TIM_OC_InitTypeDef::OCMode, TIM_OC_InitTypeDef::OCPolarity, TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_CHANNEL_3, TIM_CHANNEL_4, TIM_CHANNEL_5, TIM_CHANNEL_6, TIM_OC1_SetConfig(), TIM_OC2_SetConfig(), TIM_OC3_SetConfig(), TIM_OC4_SetConfig(), TIM_OC5_SetConfig(), and TIM_OC6_SetConfig().
| uint32_t HAL_TIM_ReadCapturedValue | ( | TIM_HandleTypeDef * | htim, |
| uint32_t | Channel | ||
| ) |
Read the captured value from Capture Compare unit.
| htim | TIM handle. |
| Channel | TIM Channels to be enabled This parameter can be one of the following values:
|
| Captured | value |
Definition at line 5707 of file stm32l4xx_hal_tim.c.
References assert_param, __TIM_HandleTypeDef::Instance, TIM_CHANNEL_1, TIM_CHANNEL_2, TIM_CHANNEL_3, and TIM_CHANNEL_4.
| HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro | ( | TIM_HandleTypeDef * | htim, |
| TIM_SlaveConfigTypeDef * | sSlaveConfig | ||
| ) |
Configures the TIM in Slave mode.
| htim | TIM handle. |
| sSlaveConfig | pointer to a TIM_SlaveConfigTypeDef structure that contains the selected trigger (internal trigger input, filtered timer input or external trigger input) and the Slave mode (Disable, Reset, Gated, Trigger, External clock mode 1). |
| HAL | status |
Definition at line 5624 of file stm32l4xx_hal_tim.c.
References __HAL_TIM_DISABLE_DMA, __HAL_TIM_DISABLE_IT, assert_param, HAL_TIM_STATE_BUSY, HAL_TIM_STATE_READY, TIM_SlaveConfigTypeDef::InputTrigger, __TIM_HandleTypeDef::Instance, IS_TIM_SLAVE_MODE, IS_TIM_TRIGGER_SELECTION, TIM_SlaveConfigTypeDef::SlaveMode, __TIM_HandleTypeDef::State, TIM_DMA_TRIGGER, TIM_IT_TRIGGER, and TIM_SlaveTimer_SetConfig().
| HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT | ( | TIM_HandleTypeDef * | htim, |
| TIM_SlaveConfigTypeDef * | sSlaveConfig | ||
| ) |
Configures the TIM in Slave mode in interrupt mode.
| htim | TIM handle. |
| sSlaveConfig | pointer to a TIM_SlaveConfigTypeDef structure that contains the selected trigger (internal trigger input, filtered timer input or external trigger input) and the Slave mode (Disable, Reset, Gated, Trigger, External clock mode 1). |
| HAL | status |
Definition at line 5664 of file stm32l4xx_hal_tim.c.
References __HAL_TIM_DISABLE_DMA, __HAL_TIM_ENABLE_IT, assert_param, HAL_TIM_STATE_BUSY, HAL_TIM_STATE_READY, TIM_SlaveConfigTypeDef::InputTrigger, __TIM_HandleTypeDef::Instance, IS_TIM_SLAVE_MODE, IS_TIM_TRIGGER_SELECTION, TIM_SlaveConfigTypeDef::SlaveMode, __TIM_HandleTypeDef::State, TIM_DMA_TRIGGER, TIM_IT_TRIGGER, and TIM_SlaveTimer_SetConfig().
1.7.6.1