STM32L443xx HAL User Manual
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Defines | |
#define | IS_LL_UTILS_SYSCLK_DIV(__VALUE__) |
#define | IS_LL_UTILS_APB1_DIV(__VALUE__) |
#define | IS_LL_UTILS_APB2_DIV(__VALUE__) |
#define | IS_LL_UTILS_PLLM_VALUE(__VALUE__) |
#define | IS_LL_UTILS_PLLN_VALUE(__VALUE__) ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) |
#define | IS_LL_UTILS_PLLR_VALUE(__VALUE__) |
#define | IS_LL_UTILS_PLLVCO_INPUT(__VALUE__) ((UTILS_PLLVCO_INPUT_MIN <= (__VALUE__)) && ((__VALUE__) <= UTILS_PLLVCO_INPUT_MAX)) |
#define | IS_LL_UTILS_PLLVCO_OUTPUT(__VALUE__) ((UTILS_PLLVCO_OUTPUT_MIN <= (__VALUE__)) && ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_MAX)) |
#define | IS_LL_UTILS_PLL_FREQUENCY(__VALUE__) |
#define | IS_LL_UTILS_HSE_BYPASS(__STATE__) |
#define | IS_LL_UTILS_HSE_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) >= UTILS_HSE_FREQUENCY_MIN) && ((__FREQUENCY__) <= UTILS_HSE_FREQUENCY_MAX)) |
#define IS_LL_UTILS_APB1_DIV | ( | __VALUE__ | ) |
(((__VALUE__) == LL_RCC_APB1_DIV_1) \ || ((__VALUE__) == LL_RCC_APB1_DIV_2) \ || ((__VALUE__) == LL_RCC_APB1_DIV_4) \ || ((__VALUE__) == LL_RCC_APB1_DIV_8) \ || ((__VALUE__) == LL_RCC_APB1_DIV_16))
Definition at line 99 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_EnablePLLAndSwitchSystem().
#define IS_LL_UTILS_APB2_DIV | ( | __VALUE__ | ) |
(((__VALUE__) == LL_RCC_APB2_DIV_1) \ || ((__VALUE__) == LL_RCC_APB2_DIV_2) \ || ((__VALUE__) == LL_RCC_APB2_DIV_4) \ || ((__VALUE__) == LL_RCC_APB2_DIV_8) \ || ((__VALUE__) == LL_RCC_APB2_DIV_16))
Definition at line 105 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_EnablePLLAndSwitchSystem().
#define IS_LL_UTILS_HSE_BYPASS | ( | __STATE__ | ) |
(((__STATE__) == LL_UTILS_HSEBYPASS_ON) \ || ((__STATE__) == LL_UTILS_HSEBYPASS_OFF))
Definition at line 134 of file stm32l4xx_ll_utils.c.
Referenced by LL_PLL_ConfigSystemClock_HSE().
#define IS_LL_UTILS_HSE_FREQUENCY | ( | __FREQUENCY__ | ) | (((__FREQUENCY__) >= UTILS_HSE_FREQUENCY_MIN) && ((__FREQUENCY__) <= UTILS_HSE_FREQUENCY_MAX)) |
Definition at line 137 of file stm32l4xx_ll_utils.c.
Referenced by LL_PLL_ConfigSystemClock_HSE().
#define IS_LL_UTILS_PLL_FREQUENCY | ( | __VALUE__ | ) |
((LL_PWR_GetRegulVoltageScaling() == LL_PWR_REGU_VOLTAGE_SCALE1) ? ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE1) : \ ((__VALUE__) <= UTILS_MAX_FREQUENCY_SCALE2))
Definition at line 131 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_GetPLLOutputFrequency().
#define IS_LL_UTILS_PLLM_VALUE | ( | __VALUE__ | ) |
(((__VALUE__) == LL_RCC_PLLM_DIV_1) \ || ((__VALUE__) == LL_RCC_PLLM_DIV_2) \ || ((__VALUE__) == LL_RCC_PLLM_DIV_3) \ || ((__VALUE__) == LL_RCC_PLLM_DIV_4) \ || ((__VALUE__) == LL_RCC_PLLM_DIV_5) \ || ((__VALUE__) == LL_RCC_PLLM_DIV_6) \ || ((__VALUE__) == LL_RCC_PLLM_DIV_7) \ || ((__VALUE__) == LL_RCC_PLLM_DIV_8))
Definition at line 111 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_GetPLLOutputFrequency().
#define IS_LL_UTILS_PLLN_VALUE | ( | __VALUE__ | ) | ((8U <= (__VALUE__)) && ((__VALUE__) <= 86U)) |
Definition at line 120 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_GetPLLOutputFrequency().
#define IS_LL_UTILS_PLLR_VALUE | ( | __VALUE__ | ) |
(((__VALUE__) == LL_RCC_PLLR_DIV_2) \ || ((__VALUE__) == LL_RCC_PLLR_DIV_4) \ || ((__VALUE__) == LL_RCC_PLLR_DIV_6) \ || ((__VALUE__) == LL_RCC_PLLR_DIV_8))
Definition at line 122 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_GetPLLOutputFrequency().
#define IS_LL_UTILS_PLLVCO_INPUT | ( | __VALUE__ | ) | ((UTILS_PLLVCO_INPUT_MIN <= (__VALUE__)) && ((__VALUE__) <= UTILS_PLLVCO_INPUT_MAX)) |
Definition at line 127 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_GetPLLOutputFrequency().
#define IS_LL_UTILS_PLLVCO_OUTPUT | ( | __VALUE__ | ) | ((UTILS_PLLVCO_OUTPUT_MIN <= (__VALUE__)) && ((__VALUE__) <= UTILS_PLLVCO_OUTPUT_MAX)) |
Definition at line 129 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_GetPLLOutputFrequency().
#define IS_LL_UTILS_SYSCLK_DIV | ( | __VALUE__ | ) |
(((__VALUE__) == LL_RCC_SYSCLK_DIV_1) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_2) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_4) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_8) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \ || ((__VALUE__) == LL_RCC_SYSCLK_DIV_512))
Definition at line 89 of file stm32l4xx_ll_utils.c.
Referenced by UTILS_EnablePLLAndSwitchSystem().