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STM32L443xx HAL User Manual
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_tim_ex.h 00004 * @author MCD Application Team 00005 * @brief Header file of TIM HAL Extended module. 00006 ****************************************************************************** 00007 * @attention 00008 * 00009 * Copyright (c) 2017 STMicroelectronics. 00010 * All rights reserved. 00011 * 00012 * This software is licensed under terms that can be found in the LICENSE file 00013 * in the root directory of this software component. 00014 * If no LICENSE file comes with this software, it is provided AS-IS. 00015 * 00016 ****************************************************************************** 00017 */ 00018 00019 /* Define to prevent recursive inclusion -------------------------------------*/ 00020 #ifndef STM32L4xx_HAL_TIM_EX_H 00021 #define STM32L4xx_HAL_TIM_EX_H 00022 00023 #ifdef __cplusplus 00024 extern "C" { 00025 #endif 00026 00027 /* Includes ------------------------------------------------------------------*/ 00028 #include "stm32l4xx_hal_def.h" 00029 00030 /** @addtogroup STM32L4xx_HAL_Driver 00031 * @{ 00032 */ 00033 00034 /** @addtogroup TIMEx 00035 * @{ 00036 */ 00037 00038 /* Exported types ------------------------------------------------------------*/ 00039 /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types 00040 * @{ 00041 */ 00042 00043 /** 00044 * @brief TIM Hall sensor Configuration Structure definition 00045 */ 00046 00047 typedef struct 00048 { 00049 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. 00050 This parameter can be a value of @ref TIM_Input_Capture_Polarity */ 00051 00052 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. 00053 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ 00054 00055 uint32_t IC1Filter; /*!< Specifies the input capture filter. 00056 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ 00057 00058 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 00059 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 00060 } TIM_HallSensor_InitTypeDef; 00061 00062 /** 00063 * @brief TIM Break/Break2 input configuration 00064 */ 00065 typedef struct 00066 { 00067 uint32_t Source; /*!< Specifies the source of the timer break input. 00068 This parameter can be a value of @ref TIMEx_Break_Input_Source */ 00069 uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. 00070 This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ 00071 uint32_t Polarity; /*!< Specifies the break input source polarity. 00072 This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity 00073 Not relevant when analog watchdog output of the DFSDM1 used as break input source */ 00074 } TIMEx_BreakInputConfigTypeDef; 00075 00076 /** 00077 * @} 00078 */ 00079 /* End of exported types -----------------------------------------------------*/ 00080 00081 /* Exported constants --------------------------------------------------------*/ 00082 /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants 00083 * @{ 00084 */ 00085 00086 /** @defgroup TIMEx_Remap TIM Extended Remapping 00087 * @{ 00088 */ 00089 #define TIM_TIM1_ETR_ADC1_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ 00090 #define TIM_TIM1_ETR_ADC1_AWD1 TIM1_OR1_ETR_ADC1_RMP_0 /* !< TIM1_ETR is connected to ADC1 AWD1 */ 00091 #define TIM_TIM1_ETR_ADC1_AWD2 TIM1_OR1_ETR_ADC1_RMP_1 /* !< TIM1_ETR is connected to ADC1 AWD2 */ 00092 #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ 00093 #if defined (ADC3) 00094 #define TIM_TIM1_ETR_ADC3_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ 00095 #define TIM_TIM1_ETR_ADC3_AWD1 TIM1_OR1_ETR_ADC3_RMP_0 /* !< TIM1_ETR is connected to ADC3 AWD1 */ 00096 #define TIM_TIM1_ETR_ADC3_AWD2 TIM1_OR1_ETR_ADC3_RMP_1 /* !< TIM1_ETR is connected to ADC3 AWD2 */ 00097 #define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */ 00098 #endif /* ADC3 */ 00099 #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1 TI1 is connected to GPIO */ 00100 #define TIM_TIM1_TI1_COMP1 TIM1_OR1_TI1_RMP /* !< TIM1 TI1 is connected to COMP1 */ 00101 #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */ 00102 #define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 output */ 00103 #if defined(COMP2) 00104 #define TIM_TIM1_ETR_COMP2 TIM1_OR2_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 output */ 00105 #endif /* COMP2 */ 00106 00107 #if defined (USB_OTG_FS) 00108 #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */ 00109 #define TIM_TIM2_ITR1_OTG_FS_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to OTG_FS SOF */ 00110 #else 00111 #if defined(STM32L471xx) 00112 #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */ 00113 #define TIM_TIM2_ITR1_NONE TIM2_OR1_ITR1_RMP /* !< No internal trigger on TIM2_ITR1 */ 00114 #else 00115 #define TIM_TIM2_ITR1_NONE 0x00000000U /* !< No internal trigger on TIM2_ITR1 */ 00116 #define TIM_TIM2_ITR1_USB_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to USB SOF */ 00117 #endif /* STM32L471xx */ 00118 #endif /* USB_OTG_FS */ 00119 #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */ 00120 #define TIM_TIM2_ETR_LSE TIM2_OR1_ETR1_RMP /* !< TIM2_ETR is connected to LSE */ 00121 #define TIM_TIM2_ETR_COMP1 TIM2_OR2_ETRSEL_0 /* !< TIM2_ETR is connected to COMP1 output */ 00122 #if defined(COMP2) 00123 #define TIM_TIM2_ETR_COMP2 TIM2_OR2_ETRSEL_1 /* !< TIM2_ETR is connected to COMP2 output */ 00124 #endif /* COMP2 */ 00125 #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2 TI4 is connected to GPIO */ 00126 #define TIM_TIM2_TI4_COMP1 TIM2_OR1_TI4_RMP_0 /* !< TIM2 TI4 is connected to COMP1 output */ 00127 #if defined(COMP2) 00128 #define TIM_TIM2_TI4_COMP2 TIM2_OR1_TI4_RMP_1 /* !< TIM2 TI4 is connected to COMP2 output */ 00129 #define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */ 00130 #endif /* COMP2 */ 00131 00132 #if defined (TIM3) 00133 #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3 TI1 is connected to GPIO */ 00134 #define TIM_TIM3_TI1_COMP1 TIM3_OR1_TI1_RMP_0 /* !< TIM3 TI1 is connected to COMP1 output */ 00135 #define TIM_TIM3_TI1_COMP2 TIM3_OR1_TI1_RMP_1 /* !< TIM3 TI1 is connected to COMP2 output */ 00136 #define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */ 00137 #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */ 00138 #define TIM_TIM3_ETR_COMP1 TIM3_OR2_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 output */ 00139 #endif /* TIM3 */ 00140 00141 #if defined (TIM8) 00142 #if defined(ADC2) && defined(ADC3) 00143 #define TIM_TIM8_ETR_ADC2_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ 00144 #define TIM_TIM8_ETR_ADC2_AWD1 TIM8_OR1_ETR_ADC2_RMP_0 /* !< TIM8_ETR is connected to ADC2 AWD1 */ 00145 #define TIM_TIM8_ETR_ADC2_AWD2 TIM8_OR1_ETR_ADC2_RMP_1 /* !< TIM8_ETR is connected to ADC2 AWD2 */ 00146 #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ 00147 #define TIM_TIM8_ETR_ADC3_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ 00148 #define TIM_TIM8_ETR_ADC3_AWD1 TIM8_OR1_ETR_ADC3_RMP_0 /* !< TIM8_ETR is connected to ADC3 AWD1 */ 00149 #define TIM_TIM8_ETR_ADC3_AWD2 TIM8_OR1_ETR_ADC3_RMP_1 /* !< TIM8_ETR is connected to ADC3 AWD2 */ 00150 #define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */ 00151 #endif /* ADC2 && ADC3 */ 00152 00153 #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8 TI1 is connected to GPIO */ 00154 #define TIM_TIM8_TI1_COMP2 TIM8_OR1_TI1_RMP /* !< TIM8 TI1 is connected to COMP1 */ 00155 #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */ 00156 #define TIM_TIM8_ETR_COMP1 TIM8_OR2_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 output */ 00157 #define TIM_TIM8_ETR_COMP2 TIM8_OR2_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 output */ 00158 #endif /* TIM8 */ 00159 00160 #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15 TI1 is connected to GPIO */ 00161 #define TIM_TIM15_TI1_LSE TIM15_OR1_TI1_RMP /* !< TIM15 TI1 is connected to LSE */ 00162 #define TIM_TIM15_ENCODERMODE_NONE 0x00000000U /* !< No redirection */ 00163 #define TIM_TIM15_ENCODERMODE_TIM2 TIM15_OR1_ENCODER_MODE_0 /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 00164 #if defined (TIM3) 00165 #define TIM_TIM15_ENCODERMODE_TIM3 TIM15_OR1_ENCODER_MODE_1 /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 00166 #endif /* TIM3 */ 00167 #if defined (TIM4) 00168 #define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ 00169 #endif /* TIM4 */ 00170 00171 #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */ 00172 #define TIM_TIM16_TI1_LSI TIM16_OR1_TI1_RMP_0 /* !< TIM16 TI1 is connected to LSI */ 00173 #define TIM_TIM16_TI1_LSE TIM16_OR1_TI1_RMP_1 /* !< TIM16 TI1 is connected to LSE */ 00174 #define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */ 00175 #if defined (TIM16_OR1_TI1_RMP_2) 00176 #define TIM_TIM16_TI1_MSI TIM16_OR1_TI1_RMP_2 /* !< TIM16 TI1 is connected to MSI */ 00177 #define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */ 00178 #define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */ 00179 #endif /* TIM16_OR1_TI1_RMP_2 */ 00180 00181 #if defined (TIM17) 00182 #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */ 00183 #define TIM_TIM17_TI1_MSI TIM17_OR1_TI1_RMP_0 /* !< TIM17 TI1 is connected to MSI */ 00184 #define TIM_TIM17_TI1_HSE_32 TIM17_OR1_TI1_RMP_1 /* !< TIM17 TI1 is connected to HSE div 32 */ 00185 #define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */ 00186 #endif /* TIM17 */ 00187 /** 00188 * @} 00189 */ 00190 00191 /** @defgroup TIMEx_Break_Input TIM Extended Break input 00192 * @{ 00193 */ 00194 #define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ 00195 #define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ 00196 /** 00197 * @} 00198 */ 00199 00200 /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source 00201 * @{ 00202 */ 00203 #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */ 00204 #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */ 00205 #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */ 00206 #if defined (DFSDM1_Channel0) 00207 #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ 00208 #endif /* DFSDM1_Channel0 */ 00209 /** 00210 * @} 00211 */ 00212 00213 /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling 00214 * @{ 00215 */ 00216 #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ 00217 #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ 00218 /** 00219 * @} 00220 */ 00221 00222 /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity 00223 * @{ 00224 */ 00225 #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ 00226 #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ 00227 /** 00228 * @} 00229 */ 00230 00231 /** 00232 * @} 00233 */ 00234 /* End of exported constants -------------------------------------------------*/ 00235 00236 /* Exported macro ------------------------------------------------------------*/ 00237 /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros 00238 * @{ 00239 */ 00240 00241 /** 00242 * @} 00243 */ 00244 /* End of exported macro -----------------------------------------------------*/ 00245 00246 /* Private macro -------------------------------------------------------------*/ 00247 /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros 00248 * @{ 00249 */ 00250 #define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F)) 00251 00252 #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ 00253 ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) 00254 00255 #if defined (DFSDM1_Channel0) 00256 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 00257 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 00258 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ 00259 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) 00260 #else 00261 #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ 00262 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ 00263 ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2)) 00264 #endif /* DFSDM1_Channel0 */ 00265 00266 #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ 00267 ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) 00268 00269 #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ 00270 ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) 00271 00272 /** 00273 * @} 00274 */ 00275 /* End of private macro ------------------------------------------------------*/ 00276 00277 /* Exported functions --------------------------------------------------------*/ 00278 /** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions 00279 * @{ 00280 */ 00281 00282 /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions 00283 * @brief Timer Hall Sensor functions 00284 * @{ 00285 */ 00286 /* Timer Hall Sensor functions **********************************************/ 00287 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig); 00288 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); 00289 00290 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); 00291 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); 00292 00293 /* Blocking mode: Polling */ 00294 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); 00295 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); 00296 /* Non-Blocking mode: Interrupt */ 00297 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); 00298 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); 00299 /* Non-Blocking mode: DMA */ 00300 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); 00301 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); 00302 /** 00303 * @} 00304 */ 00305 00306 /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions 00307 * @brief Timer Complementary Output Compare functions 00308 * @{ 00309 */ 00310 /* Timer Complementary Output Compare functions *****************************/ 00311 /* Blocking mode: Polling */ 00312 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 00313 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 00314 00315 /* Non-Blocking mode: Interrupt */ 00316 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00317 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00318 00319 /* Non-Blocking mode: DMA */ 00320 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 00321 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 00322 /** 00323 * @} 00324 */ 00325 00326 /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions 00327 * @brief Timer Complementary PWM functions 00328 * @{ 00329 */ 00330 /* Timer Complementary PWM functions ****************************************/ 00331 /* Blocking mode: Polling */ 00332 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); 00333 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); 00334 00335 /* Non-Blocking mode: Interrupt */ 00336 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00337 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); 00338 /* Non-Blocking mode: DMA */ 00339 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); 00340 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); 00341 /** 00342 * @} 00343 */ 00344 00345 /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions 00346 * @brief Timer Complementary One Pulse functions 00347 * @{ 00348 */ 00349 /* Timer Complementary One Pulse functions **********************************/ 00350 /* Blocking mode: Polling */ 00351 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00352 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00353 00354 /* Non-Blocking mode: Interrupt */ 00355 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00356 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); 00357 /** 00358 * @} 00359 */ 00360 00361 /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions 00362 * @brief Peripheral Control functions 00363 * @{ 00364 */ 00365 /* Extended Control functions ************************************************/ 00366 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 00367 uint32_t CommutationSource); 00368 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 00369 uint32_t CommutationSource); 00370 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, 00371 uint32_t CommutationSource); 00372 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, 00373 TIM_MasterConfigTypeDef *sMasterConfig); 00374 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, 00375 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); 00376 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, 00377 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); 00378 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); 00379 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); 00380 /** 00381 * @} 00382 */ 00383 00384 /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions 00385 * @brief Extended Callbacks functions 00386 * @{ 00387 */ 00388 /* Extended Callback **********************************************************/ 00389 void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim); 00390 void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim); 00391 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); 00392 void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim); 00393 /** 00394 * @} 00395 */ 00396 00397 /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions 00398 * @brief Extended Peripheral State functions 00399 * @{ 00400 */ 00401 /* Extended Peripheral State functions ***************************************/ 00402 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); 00403 HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN); 00404 /** 00405 * @} 00406 */ 00407 00408 /** 00409 * @} 00410 */ 00411 /* End of exported functions -------------------------------------------------*/ 00412 00413 /* Private functions----------------------------------------------------------*/ 00414 /** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions 00415 * @{ 00416 */ 00417 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); 00418 void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); 00419 /** 00420 * @} 00421 */ 00422 /* End of private functions --------------------------------------------------*/ 00423 00424 /** 00425 * @} 00426 */ 00427 00428 /** 00429 * @} 00430 */ 00431 00432 #ifdef __cplusplus 00433 } 00434 #endif 00435 00436 00437 #endif /* STM32L4xx_HAL_TIM_EX_H */
1.7.6.1