LL_ADC_REG_InitTypeDef Struct Reference

Structure definition of some features of ADC group regular. More...

#include <stm32f1xx_ll_adc.h>

Data Fields
uint32_t	TriggerSource
uint32_t	SequencerLength
uint32_t	SequencerDiscont
uint32_t	ContinuousMode
uint32_t	DMATransfer

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Detailed Description

Structure definition of some features of ADC group regular.

Note:

These parameters have an impact on ADC scope: ADC group regular. Refer to corresponding unitary functions into Configuration of ADC hierarchical scope: group regular (functions with prefix "REG").

The setting of these parameters by function LL_ADC_REG_Init() is conditioned to ADC state: ADC instance must be disabled. This condition is applied to all ADC features, for efficiency and compatibility over all STM32 families. However, the different features can be set under different ADC state conditions (setting possible with ADC enabled without conversion on going, ADC enabled with conversion on going, ...) Each feature can be updated afterwards with a unitary function and potentially with ADC in a different state than disabled, refer to description of each function for setting conditioned to ADC state.

Definition at line 312 of file stm32f1xx_ll_adc.h.

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Field Documentation

uint32_t LL_ADC_REG_InitTypeDef::ContinuousMode

Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically). This parameter can be a value of ADC group regular - Continuous mode Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.

This feature can be modified afterwards using unitary function LL_ADC_REG_SetContinuousMode().

Definition at line 334 of file stm32f1xx_ll_adc.h.

Referenced by LL_ADC_REG_Init(), and LL_ADC_REG_StructInit().

uint32_t LL_ADC_REG_InitTypeDef::DMATransfer

Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode. This parameter can be a value of ADC group regular - DMA transfer of ADC conversion data

This feature can be modified afterwards using unitary function LL_ADC_REG_SetDMATransfer().

Definition at line 340 of file stm32f1xx_ll_adc.h.

Referenced by LL_ADC_REG_Init(), and LL_ADC_REG_StructInit().

uint32_t LL_ADC_REG_InitTypeDef::SequencerDiscont

Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks. This parameter can be a value of ADC group regular - Sequencer discontinuous mode

Note:

This parameter has an effect only if group regular sequencer is enabled (scan length of 2 ranks or more).

This feature can be modified afterwards using unitary function LL_ADC_REG_SetSequencerDiscont().

Definition at line 327 of file stm32f1xx_ll_adc.h.

Referenced by LL_ADC_REG_Init(), and LL_ADC_REG_StructInit().

uint32_t LL_ADC_REG_InitTypeDef::SequencerLength

Set ADC group regular sequencer length. This parameter can be a value of ADC group regular - Sequencer scan length

Note:

This parameter is discarded if scan mode is disabled (refer to parameter 'ADC_SequencersScanMode').

This feature can be modified afterwards using unitary function LL_ADC_REG_SetSequencerLength().

Definition at line 321 of file stm32f1xx_ll_adc.h.

Referenced by LL_ADC_REG_Init(), and LL_ADC_REG_StructInit().

uint32_t LL_ADC_REG_InitTypeDef::TriggerSource

Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line). This parameter can be a value of ADC group regular - Trigger source

Note:

On this STM32 serie, external trigger is set with trigger polarity: rising edge (only trigger polarity available on this STM32 serie).

This feature can be modified afterwards using unitary function LL_ADC_REG_SetTriggerSource().

Definition at line 314 of file stm32f1xx_ll_adc.h.

Referenced by LL_ADC_REG_Init(), and LL_ADC_REG_StructInit().

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The documentation for this struct was generated from the following file:

• stm32f1xx_ll_adc.h