STM32L443xx HAL User Manual
Defines
APB1 Peripheral Clock Enable Disable
RCC Exported Macros

Enable or disable the APB1 peripheral clock. More...

Defines

#define __HAL_RCC_TIM2_CLK_ENABLE()
#define __HAL_RCC_TIM6_CLK_ENABLE()
#define __HAL_RCC_TIM7_CLK_ENABLE()
#define __HAL_RCC_LCD_CLK_ENABLE()
#define __HAL_RCC_RTCAPB_CLK_ENABLE()
#define __HAL_RCC_WWDG_CLK_ENABLE()
#define __HAL_RCC_SPI2_CLK_ENABLE()
#define __HAL_RCC_SPI3_CLK_ENABLE()
#define __HAL_RCC_USART2_CLK_ENABLE()
#define __HAL_RCC_USART3_CLK_ENABLE()
#define __HAL_RCC_I2C1_CLK_ENABLE()
#define __HAL_RCC_I2C2_CLK_ENABLE()
#define __HAL_RCC_I2C3_CLK_ENABLE()
#define __HAL_RCC_CRS_CLK_ENABLE()
#define __HAL_RCC_CAN1_CLK_ENABLE()
#define __HAL_RCC_USB_CLK_ENABLE()
#define __HAL_RCC_PWR_CLK_ENABLE()
#define __HAL_RCC_DAC1_CLK_ENABLE()
#define __HAL_RCC_OPAMP_CLK_ENABLE()
#define __HAL_RCC_LPTIM1_CLK_ENABLE()
#define __HAL_RCC_LPUART1_CLK_ENABLE()
#define __HAL_RCC_SWPMI1_CLK_ENABLE()
#define __HAL_RCC_LPTIM2_CLK_ENABLE()
#define __HAL_RCC_TIM2_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)
#define __HAL_RCC_TIM6_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN)
#define __HAL_RCC_TIM7_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN)
#define __HAL_RCC_LCD_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN);
#define __HAL_RCC_RTCAPB_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN);
#define __HAL_RCC_SPI2_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN)
#define __HAL_RCC_SPI3_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN)
#define __HAL_RCC_USART2_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN)
#define __HAL_RCC_USART3_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN)
#define __HAL_RCC_I2C1_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN)
#define __HAL_RCC_I2C2_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN)
#define __HAL_RCC_I2C3_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN)
#define __HAL_RCC_CRS_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN);
#define __HAL_RCC_CAN1_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN)
#define __HAL_RCC_USB_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN);
#define __HAL_RCC_PWR_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)
#define __HAL_RCC_DAC1_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN)
#define __HAL_RCC_OPAMP_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN)
#define __HAL_RCC_LPTIM1_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN)
#define __HAL_RCC_LPUART1_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN)
#define __HAL_RCC_SWPMI1_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN)
#define __HAL_RCC_LPTIM2_CLK_DISABLE()   CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN)

Detailed Description

Enable or disable the APB1 peripheral clock.

Note:
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Define Documentation

#define __HAL_RCC_CAN1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN)

Definition at line 1411 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_CAN1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CAN1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1254 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_CRS_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN);

Definition at line 1407 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_CRS_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_CRSEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1244 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DAC1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN)

Definition at line 1425 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_DAC1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_DAC1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1292 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN)

Definition at line 1394 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1207 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN)

Definition at line 1397 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C2_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C2EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1216 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C3_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN)

Definition at line 1400 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_I2C3_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C3EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1225 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LCD_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN);

Definition at line 1365 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LCD_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LCDEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1122 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN)

Definition at line 1430 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_LPTIM1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1309 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM2_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN)

Definition at line 1438 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPTIM2_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPTIM2EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1335 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPUART1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN)

Definition at line 1432 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_LPUART1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_LPUART1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1317 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_OPAMP_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN)

Definition at line 1428 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_OPAMP_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_OPAMPEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1301 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_PWR_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)

Definition at line 1422 of file stm32l4xx_hal_rcc.h.

Referenced by HAL_RCC_OscConfig(), HAL_RCCEx_DisableLSCO(), HAL_RCCEx_EnableLSCO(), HAL_RCCEx_PeriphCLKConfig(), and RCC_SetFlashLatencyFromMSIRange().

#define __HAL_RCC_PWR_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_PWREN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1283 of file stm32l4xx_hal_rcc.h.

Referenced by HAL_RCC_OscConfig(), HAL_RCCEx_DisableLSCO(), HAL_RCCEx_EnableLSCO(), HAL_RCCEx_PeriphCLKConfig(), and RCC_SetFlashLatencyFromMSIRange().

#define __HAL_RCC_RTCAPB_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN);

Definition at line 1369 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_RTCAPB_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_RTCAPBEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1132 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI2_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN)

Definition at line 1373 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI2_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI2EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1150 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI3_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN)

Definition at line 1377 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SPI3_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_SPI3EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1160 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SWPMI1_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN)

Definition at line 1435 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_SWPMI1_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR2, RCC_APB1ENR2_SWPMI1EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1326 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM2_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN)

Definition at line 1344 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM2_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1065 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM6_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN)

Definition at line 1358 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM6_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1103 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM7_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN)

Definition at line 1361 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_TIM7_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM7EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1112 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART2_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN)

Definition at line 1380 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART2_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1169 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART3_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN)

Definition at line 1383 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USART3_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART3EN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1178 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USB_CLK_DISABLE ( )    CLEAR_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN);

Definition at line 1419 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_USB_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USBFSEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1274 of file stm32l4xx_hal_rcc.h.

#define __HAL_RCC_WWDG_CLK_ENABLE ( )
Value:
do { \
                                                 __IO uint32_t tmpreg; \
                                                 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
                                                 /* Delay after an RCC peripheral clock enabling */ \
                                                 tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
                                                 UNUSED(tmpreg); \
                                               } while(0)

Definition at line 1141 of file stm32l4xx_hal_rcc.h.

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