AHB1

Functions
__STATIC_INLINE void	LL_AHB1_GRP1_EnableClock (uint32_t Periphs)
	Enable AHB1 peripherals clock.
__STATIC_INLINE uint32_t	LL_AHB1_GRP1_IsEnabledClock (uint32_t Periphs)
	Check if AHB1 peripheral clock is enabled or not.
__STATIC_INLINE void	LL_AHB1_GRP1_DisableClock (uint32_t Periphs)
	Disable AHB1 peripherals clock.
__STATIC_INLINE void	LL_AHB1_GRP1_ForceReset (uint32_t Periphs)
	Force AHB1 peripherals reset.
__STATIC_INLINE void	LL_AHB1_GRP1_ReleaseReset (uint32_t Periphs)
	Release AHB1 peripherals reset.
__STATIC_INLINE void	LL_AHB1_GRP1_EnableClockSleep (uint32_t Periphs)
	Enable AHB1 peripherals clock during Low Power (Sleep) mode.
__STATIC_INLINE void	LL_AHB1_GRP1_DisableClockSleep (uint32_t Periphs)
	Disable AHB1 peripherals clock during Low Power (Sleep) mode.

---

Function Documentation

__STATIC_INLINE void LL_AHB1_GRP1_DisableClock

(

uint32_t

Periphs

)

Disable AHB1 peripherals clock.

Reference Manual to LL API cross reference:

AHB1ENR DMA1EN LL_AHB1_GRP1_DisableClock
AHB1ENR DMA2EN LL_AHB1_GRP1_DisableClock
AHB1ENR ADC12EN LL_AHB1_GRP1_DisableClock
AHB1ENR ARTEN LL_AHB1_GRP1_DisableClock
(*) AHB1ENR ETH1MACEN LL_AHB1_GRP1_DisableClock
(*) AHB1ENR ETH1TXEN LL_AHB1_GRP1_DisableClock
(*) AHB1ENR ETH1RXEN LL_AHB1_GRP1_DisableClock
(*) AHB1ENR USB1OTGHSEN LL_AHB1_GRP1_DisableClock
AHB1ENR USB1OTGHSULPIEN LL_AHB1_GRP1_DisableClock
AHB1ENR USB2OTGHSEN LL_AHB1_GRP1_DisableClock
(*) AHB1ENR USB2OTGHSULPIEN LL_AHB1_GRP1_DisableClock (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB1_GRP1_PERIPH_DMA1 LL_AHB1_GRP1_PERIPH_DMA2 LL_AHB1_GRP1_PERIPH_ADC12 LL_AHB1_GRP1_PERIPH_ART (*) LL_AHB1_GRP1_PERIPH_CRC (*) LL_AHB1_GRP1_PERIPH_ETH1MAC (*) LL_AHB1_GRP1_PERIPH_ETH1TX (*) LL_AHB1_GRP1_PERIPH_ETH1RX (*) LL_AHB1_GRP1_PERIPH_USB1OTGHS LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI LL_AHB1_GRP1_PERIPH_USB2OTGHS (*) LL_AHB1_GRP1_PERIPH_USB2OTGHSULPI (*) (*) value not defined in all devices.

Return values:

None

Definition at line 947 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB1_GRP1_DisableClockSleep

(

uint32_t

Periphs

)

Disable AHB1 peripherals clock during Low Power (Sleep) mode.

Reference Manual to LL API cross reference:

AHB1LPENR DMA1LPEN LL_AHB1_GRP1_DisableClockSleep
AHB1LPENR DMA2LPEN LL_AHB1_GRP1_DisableClockSleep
AHB1LPENR ADC12LPEN LL_AHB1_GRP1_DisableClockSleep
AHB1LPENR ARTLPEN LL_AHB1_GRP1_DisableClockSleep
(*) AHB1LPENR CRCLPEN LL_AHB1_GRP1_DisableClockSleep
(*) AHB1LPENR ETH1MACLPEN LL_AHB1_GRP1_DisableClockSleep
(*) AHB1LPENR ETH1TXLPEN LL_AHB1_GRP1_DisableClockSleep
(*) AHB1LPENR ETH1RXLPEN LL_AHB1_GRP1_DisableClockSleep
(*) AHB1LPENR USB1OTGHSLPEN LL_AHB1_GRP1_DisableClockSleep
AHB1LPENR USB1OTGHSULPILPEN LL_AHB1_GRP1_DisableClockSleep
AHB1LPENR USB2OTGHSLPEN LL_AHB1_GRP1_DisableClockSleep
(*) AHB1LPENR USB2OTGHSULPILPEN LL_AHB1_GRP1_DisableClockSleep (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB1_GRP1_PERIPH_DMA1 LL_AHB1_GRP1_PERIPH_DMA2 LL_AHB1_GRP1_PERIPH_ADC12 LL_AHB1_GRP1_PERIPH_ART (*) LL_AHB1_GRP1_PERIPH_CRC (*) LL_AHB1_GRP1_PERIPH_ETH1MAC (*) LL_AHB1_GRP1_PERIPH_ETH1TX (*) LL_AHB1_GRP1_PERIPH_ETH1RX (*) LL_AHB1_GRP1_PERIPH_USB1OTGHS LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI LL_AHB1_GRP1_PERIPH_USB2OTGHS (*) LL_AHB1_GRP1_PERIPH_USB2OTGHSULPI (*) (*) value not defined in all devices.

Return values:

None

Definition at line 1079 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB1_GRP1_EnableClock

(

uint32_t

Periphs

)

Enable AHB1 peripherals clock.

Reference Manual to LL API cross reference:

AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock
AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock
AHB1ENR ADC12EN LL_AHB1_GRP1_EnableClock
AHB1ENR ARTEN LL_AHB1_GRP1_EnableClock
AHB1ENR ETH1MACEN LL_AHB1_GRP1_EnableClock
(*) AHB1ENR ETH1TXEN LL_AHB1_GRP1_EnableClock
(*) AHB1ENR ETH1RXEN LL_AHB1_GRP1_EnableClock
(*) AHB1ENR USB1OTGHSEN LL_AHB1_GRP1_EnableClock
AHB1ENR USB1OTGHSULPIEN LL_AHB1_GRP1_EnableClock
AHB1ENR USB2OTGHSEN LL_AHB1_GRP1_EnableClock
(*) AHB1ENR USB2OTGHSULPIEN LL_AHB1_GRP1_EnableClock (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB1_GRP1_PERIPH_DMA1 LL_AHB1_GRP1_PERIPH_DMA2 LL_AHB1_GRP1_PERIPH_ADC12 LL_AHB1_GRP1_PERIPH_ART (*) LL_AHB1_GRP1_PERIPH_ETH1MAC (*) LL_AHB1_GRP1_PERIPH_ETH1TX (*) LL_AHB1_GRP1_PERIPH_ETH1RX (*) LL_AHB1_GRP1_PERIPH_USB1OTGHS LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI LL_AHB1_GRP1_PERIPH_USB2OTGHS (*) LL_AHB1_GRP1_PERIPH_USB2OTGHSULPI (*) (*) value not defined in all devices.

Return values:

None

Definition at line 872 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB1_GRP1_EnableClockSleep

(

uint32_t

Periphs

)

Enable AHB1 peripherals clock during Low Power (Sleep) mode.

Reference Manual to LL API cross reference:

AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockSleep
AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockSleep
AHB1LPENR ADC12LPEN LL_AHB1_GRP1_EnableClockSleep
AHB1LPENR ARTLPEN LL_AHB1_GRP1_EnableClockSleep
(*) AHB1LPENR CRCLPEN LL_AHB1_GRP1_EnableClockSleep
(*) AHB1LPENR ETH1MACLPEN LL_AHB1_GRP1_EnableClockSleep
(*) AHB1LPENR ETH1TXLPEN LL_AHB1_GRP1_EnableClockSleep
(*) AHB1LPENR ETH1RXLPEN LL_AHB1_GRP1_EnableClockSleep
AHB1LPENR USB1OTGHSLPEN LL_AHB1_GRP1_EnableClockSleep
AHB1LPENR USB1OTGHSULPILPEN LL_AHB1_GRP1_EnableClockSleep
AHB1LPENR USB2OTGHSLPEN LL_AHB1_GRP1_EnableClockSleep
(*) AHB1LPENR USB2OTGHSULPILPEN LL_AHB1_GRP1_EnableClockSleep (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB1_GRP1_PERIPH_DMA1 LL_AHB1_GRP1_PERIPH_DMA2 LL_AHB1_GRP1_PERIPH_ADC12 LL_AHB1_GRP1_PERIPH_ART (*) LL_AHB1_GRP1_PERIPH_CRC (*) LL_AHB1_GRP1_PERIPH_ETH1MAC (*) LL_AHB1_GRP1_PERIPH_ETH1TX (*) LL_AHB1_GRP1_PERIPH_ETH1RX (*) LL_AHB1_GRP1_PERIPH_USB1OTGHS LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI LL_AHB1_GRP1_PERIPH_USB2OTGHS (*) LL_AHB1_GRP1_PERIPH_USB2OTGHSULPI (*) (*) value not defined in all devices.

Return values:

None

Definition at line 1039 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB1_GRP1_ForceReset

(

uint32_t

Periphs

)

Force AHB1 peripherals reset.

Reference Manual to LL API cross reference:

AHB1RSTR DMA1RST LL_AHB1_GRP1_ForceReset
AHB1RSTR DMA2RST LL_AHB1_GRP1_ForceReset
AHB1RSTR ADC12RST LL_AHB1_GRP1_ForceReset
AHB1RSTR ARTRST LL_AHB1_GRP1_ForceReset
(*) AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset
(*) AHB1RSTR ETH1MACRST LL_AHB1_GRP1_ForceReset
(*) AHB1RSTR USB1OTGHSRST LL_AHB1_GRP1_ForceReset
AHB1RSTR USB2OTGHSRST LL_AHB1_GRP1_ForceReset (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB1_GRP1_PERIPH_DMA1 LL_AHB1_GRP1_PERIPH_DMA2 LL_AHB1_GRP1_PERIPH_ADC12 LL_AHB1_GRP1_PERIPH_ART (*) LL_AHB1_GRP1_PERIPH_CRC (*) LL_AHB1_GRP1_PERIPH_ETH1MAC (*) LL_AHB1_GRP1_PERIPH_USB1OTGHS LL_AHB1_GRP1_PERIPH_USB2OTGHS (*) (*) value not defined in all devices.

Return values:

None

Definition at line 975 of file stm32h7xx_ll_bus.h.

Referenced by LL_ADC_CommonDeInit(), LL_BDMA_DeInit(), LL_CRC_DeInit(), and LL_DMA_DeInit().

__STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock

(

uint32_t

Periphs

)

Check if AHB1 peripheral clock is enabled or not.

Reference Manual to LL API cross reference:

AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock
AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock
AHB1ENR ADC12EN LL_AHB1_GRP1_IsEnabledClock
AHB1ENR ARTEN LL_AHB1_GRP1_IsEnabledClock
(*) AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock
(*) AHB1ENR ETH1MACEN LL_AHB1_GRP1_IsEnabledClock
(*) AHB1ENR ETH1TXEN LL_AHB1_GRP1_IsEnabledClock
(*) AHB1ENR ETH1RXEN LL_AHB1_GRP1_IsEnabledClock
(*) AHB1ENR USB1OTGHSEN LL_AHB1_GRP1_IsEnabledClock
AHB1ENR USB1OTGHSULPIEN LL_AHB1_GRP1_IsEnabledClock
AHB1ENR USB2OTGHSEN LL_AHB1_GRP1_IsEnabledClock
(*) AHB1ENR USB2OTGHSULPIEN LL_AHB1_GRP1_IsEnabledClock (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB1_GRP1_PERIPH_DMA1 LL_AHB1_GRP1_PERIPH_DMA2 LL_AHB1_GRP1_PERIPH_ADC12 LL_AHB1_GRP1_PERIPH_ART (*) LL_AHB1_GRP1_PERIPH_CRC (*) LL_AHB1_GRP1_PERIPH_ETH1MAC (*) LL_AHB1_GRP1_PERIPH_ETH1TX (*) LL_AHB1_GRP1_PERIPH_ETH1RX (*) LL_AHB1_GRP1_PERIPH_USB1OTGHS LL_AHB1_GRP1_PERIPH_USB1OTGHSULPI LL_AHB1_GRP1_PERIPH_USB2OTGHS (*) LL_AHB1_GRP1_PERIPH_USB2OTGHSULPI (*) (*) value not defined in all devices.

Return values:

uint32_t

Definition at line 912 of file stm32h7xx_ll_bus.h.

__STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset

(

uint32_t

Periphs

)

Release AHB1 peripherals reset.

Reference Manual to LL API cross reference:

AHB1RSTR DMA1RST LL_AHB1_GRP1_ReleaseReset
AHB1RSTR DMA2RST LL_AHB1_GRP1_ReleaseReset
AHB1RSTR ADC12RST LL_AHB1_GRP1_ReleaseReset
AHB1RSTR ARTRST LL_AHB1_GRP1_ReleaseReset
(*) AHB1RSTR CRCRST LL_AHB1_GRP1_ReleaseReset
(*) AHB1RSTR ETH1MACRST LL_AHB1_GRP1_ReleaseReset
(*) AHB1RSTR USB1OTGHSRST LL_AHB1_GRP1_ReleaseReset
AHB1RSTR USB2OTGHSRST LL_AHB1_GRP1_ReleaseReset (*)

Parameters:

Periphs

This parameter can be a combination of the following values: LL_AHB1_GRP1_PERIPH_DMA1 LL_AHB1_GRP1_PERIPH_DMA2 LL_AHB1_GRP1_PERIPH_ADC12 LL_AHB1_GRP1_PERIPH_ART (*) LL_AHB1_GRP1_PERIPH_CRC (*) LL_AHB1_GRP1_PERIPH_ETH1MAC (*) LL_AHB1_GRP1_PERIPH_USB1OTGHS LL_AHB1_GRP1_PERIPH_USB2OTGHS (*) (*) value not defined in all devices.

Return values:

None

Definition at line 1003 of file stm32h7xx_ll_bus.h.

Referenced by LL_ADC_CommonDeInit(), LL_BDMA_DeInit(), LL_CRC_DeInit(), and LL_DMA_DeInit().